| /src/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VVPInstrPatternsVec.td | 21 ValueType PtrVT, ValueType MaskVT,
26 (i64 simm7:$stride), (MaskVT true_mask), i32:$avl),
32 i64:$stride, (MaskVT true_mask), i32:$avl),
38 (i64 simm7:$stride), MaskVT:$mask, i32:$avl),
44 i64:$stride, MaskVT:$mask, i32:$avl),
55 ValueType PtrVT, ValueType MaskVT,
60 (MaskVT true_mask), i32:$avl)),
66 (MaskVT true_mask), i32:$avl)),
72 MaskVT:$mask, i32:$avl)),
82 PtrVT:$addr, i64:$stride, MaskVT:$mask, i32:$avl)),
[all …]
|
| H A D | VEInstrPatternsVec.td | 123 class Mask_Binary<ValueType MaskVT, SDPatternOperator MaskOp, string InstName> :
124 Pat<(MaskVT (MaskOp MaskVT:$ma, MaskVT:$mb)), (!cast<Instruction>(InstName#"mm") $ma, $mb)>;
|
| H A D | VECustomDAG.cpp | 410 auto MaskVT = getLegalVectorType(Packing, MVT::i1); in getConstantMask() local
414 auto AVL = getConstant(MaskVT.getVectorNumElements(), MVT::i32); in getConstantMask()
415 auto Res = getNode(VEISD::VEC_BROADCAST, MaskVT, {TrueVal, AVL}); in getConstantMask()
|
| H A D | VEISelLowering.cpp | 359 for (MVT MaskVT : AllMaskVTs) { in initVPUActions() local
361 setOperationAction(ISD::STORE, MaskVT, Custom); in initVPUActions()
362 setOperationAction(ISD::LOAD, MaskVT, Custom); in initVPUActions()
|
| /src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 7324 MVT MaskVT = BOperand.getSimpleValueType(); in lowerBuildVectorAsBroadcast() local
7326 if ((EltType == MVT::i64 && MaskVT == MVT::v8i1) || // for broadcastmb2q in lowerBuildVectorAsBroadcast()
7327 (EltType == MVT::i32 && MaskVT == MVT::v16i1)) { // for broadcastmw2d in lowerBuildVectorAsBroadcast()
9889 static SDValue getMaskNode(SDValue Mask, MVT MaskVT,
10487 MVT MaskVT = VT; in lowerShuffleAsBitMask() local
10493 MaskVT = MVT::getVectorVT(EltVT, Mask.size()); in lowerShuffleAsBitMask()
10526 SDValue VMask = DAG.getBuildVector(MaskVT, DL, VMaskOps); in lowerShuffleAsBitMask()
14107 MVT MaskVT = VT.changeTypeToInteger(); in lowerShuffleWithPERMV() local
14122 MaskNode = getConstVector(AdjustedMask, MaskVT, DAG, DL, true); in lowerShuffleWithPERMV()
14125 MaskNode = getConstVector(Mask, MaskVT, DAG, DL, true); in lowerShuffleWithPERMV()
[all …]
|
| H A D | X86ISelDAGToDAG.cpp | 4959 MVT MaskVT = ResVT; in tryVPTESTM() local
4966 MaskVT = MVT::getVectorVT(MVT::i1, NumElts); in tryVPTESTM()
4976 unsigned RegClass = TLI->getRegClassFor(MaskVT)->getID(); in tryVPTESTM()
4979 dl, MaskVT, InMask, RC), 0); in tryVPTESTM()
4989 SDVTList VTs = CurDAG->getVTList(MaskVT, MVT::Other); in tryVPTESTM()
5007 CNode = CurDAG->getMachineNode(Opc, dl, MaskVT, InMask, Src0, Src1); in tryVPTESTM()
5009 CNode = CurDAG->getMachineNode(Opc, dl, MaskVT, Src0, Src1); in tryVPTESTM()
6339 MVT MaskVT = Mask.getSimpleValueType(); in Select() local
6344 if (!ValueVT.isVector() || !MaskVT.isVector()) in Select()
6354 bool AVX512Gather = MaskVT.getVectorElementType() == MVT::i1; in Select()
[all …]
|
| H A D | X86TargetTransformInfo.cpp | 6310 auto *MaskVT = FixedVectorType::get(I1Type, VecTy->getNumElements()); in getInterleavedMemoryOpCostAVX512() local
6311 MaskCost += getArithmeticInstrCost(BinaryOperator::And, MaskVT, CostKind); in getInterleavedMemoryOpCostAVX512()
|
| H A D | X86InstrSSE.td | 7978 ValueType MaskVT> {
7980 def: Pat<(masked_store (VT RC:$src), addr:$ptr, (MaskVT RC:$mask)),
7983 def: Pat<(VT (masked_load addr:$ptr, (MaskVT RC:$mask), undef)),
7985 def: Pat<(VT (masked_load addr:$ptr, (MaskVT RC:$mask),
|
| /src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 1505 EVT MaskVT = Mask.getValueType(); in ExpandVP_MERGE() local
1506 bool IsFixedLen = MaskVT.isFixedLengthVector(); in ExpandVP_MERGE()
1509 MaskVT.getVectorElementCount()); in ExpandVP_MERGE()
1522 EVLVecVT) != MaskVT) in ExpandVP_MERGE()
1528 DAG.getSetCC(DL, MaskVT, StepVec, SplatEVL, ISD::CondCode::SETULT); in ExpandVP_MERGE()
1530 SDValue FullMask = DAG.getNode(ISD::AND, DL, MaskVT, Mask, EVLMask); in ExpandVP_MERGE()
1906 EVT MaskVT = TLI.getSetCCResultType(DAG.getDataLayout(), *Ctx, VT); in tryExpandVecMathCall() local
1907 Entry.Node = DAG.getBoolConstant(true, DL, MaskVT, VT); in tryExpandVecMathCall()
1908 Entry.Ty = MaskVT.getTypeForEVT(*Ctx); in tryExpandVecMathCall()
|
| H A D | LegalizeVectorTypes.cpp | 1367 EVT MaskVT = Mask.getValueType(); in SplitMask() local
1368 if (getTypeAction(MaskVT) == TargetLowering::TypeSplitVector) in SplitMask()
5804 EVT MaskVT = Mask.getValueType(); in WidenVecRes_MLOAD() local
5811 MaskVT.getVectorElementType(), in WidenVecRes_MLOAD()
5829 EVT MaskVT = Mask.getValueType(); in WidenVecRes_MGATHER() local
5837 MaskVT.getVectorElementType(), in WidenVecRes_MGATHER()
5952 SDValue DAGTypeLegalizer::convertMask(SDValue InMask, EVT MaskVT, in convertMask() argument
5966 { MaskVT, MVT::Other }, Ops); in convertMask()
5970 Mask = DAG.getNode(InMask->getOpcode(), SDLoc(InMask), MaskVT, Ops); in convertMask()
5975 unsigned MaskScalarBits = MaskVT.getScalarSizeInBits(); in convertMask()
[all …]
|
| H A D | LegalizeTypes.h | 1126 SDValue convertMask(SDValue InMask, EVT MaskVT, EVT ToMaskVT);
|
| H A D | TargetLowering.cpp | 10075 EVT MaskVT = Mask.getValueType(); in IncrementMemoryAddress() local
10076 assert(DataVT.getVectorElementCount() == MaskVT.getVectorElementCount() && in IncrementMemoryAddress()
10083 EVT MaskIntVT = EVT::getIntegerVT(*DAG.getContext(), MaskVT.getSizeInBits()); in IncrementMemoryAddress()
11442 EVT MaskVT = Mask.getValueType(); in expandVECTOR_COMPRESS() local
11443 EVT MaskScalarVT = MaskVT.getScalarType(); in expandVECTOR_COMPRESS()
11482 ISD::TRUNCATE, DL, MaskVT.changeVectorElementType(MVT::i1), Mask); in expandVECTOR_COMPRESS()
11484 MaskVT.changeVectorElementType(ScalarVT), Popcount); in expandVECTOR_COMPRESS()
|
| H A D | SelectionDAG.cpp | 7561 [[maybe_unused]] EVT MaskVT = N2.getValueType(); in getNode() local
7564 assert(VecVT.isVector() && MaskVT.isVector() && PassthruVT.isVector() && in getNode()
7567 assert(VecVT.getVectorElementCount() == MaskVT.getVectorElementCount() && in getNode()
|
| /src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 2764 MVT MaskVT = getMaskTypeFor(VecVT); in getAllOnesMask() local
2765 return DAG.getNode(RISCVISD::VMSET_VL, DL, MaskVT, VL); in getAllOnesMask()
3168 MVT MaskVT = Mask.getSimpleValueType(); in lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND() local
3170 DAG.getVTList(MaskVT, MVT::Other), in lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND()
3172 DAG.getUNDEF(MaskVT), Mask, VL}); in lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND()
3197 RISCVISD::SETCC_VL, DL, MaskVT, in lowerVectorStrictFTRUNC_FCEIL_FFLOOR_FROUND()
4143 MVT MaskVT = MVT::getVectorVT(MVT::i1, NumElts); in lowerBUILD_VECTOR() local
4144 SDValue SelectMask = DAG.getBuildVector(MaskVT, DL, MaskVals); in lowerBUILD_VECTOR()
5372 MVT MaskVT = MVT::getVectorVT(MVT::i1, NumElts); in lowerVECTOR_SHUFFLE() local
5373 SDValue SelectMask = DAG.getBuildVector(MaskVT, DL, MaskVals); in lowerVECTOR_SHUFFLE()
[all …]
|
| H A D | RISCVISelDAGToDAG.cpp | 3870 MVT MaskVT = MVT::getVectorVT(MVT::i1, EC); in performCombineVMergeAndVOps() local
3873 SDValue(CurDAG->getMachineNode(VMSetOpc, DL, MaskVT, VL, SEW), 0); in performCombineVMergeAndVOps()
3876 Mask = CurDAG->getRegister(RISCV::V0, MaskVT); in performCombineVMergeAndVOps()
|
| /src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 1540 auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
1541 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
|
| /src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 27163 MVT MaskVT; in getPredicateForFixedLengthVector() local
27168 MaskVT = MVT::nxv16i1; in getPredicateForFixedLengthVector()
27173 MaskVT = MVT::nxv8i1; in getPredicateForFixedLengthVector()
27177 MaskVT = MVT::nxv4i1; in getPredicateForFixedLengthVector()
27181 MaskVT = MVT::nxv2i1; in getPredicateForFixedLengthVector()
27185 return getPTrue(DAG, DL, MaskVT, *PgPattern); in getPredicateForFixedLengthVector()
27758 EVT MaskVT = Op.getOperand(0).getValueType(); in LowerFixedLengthVectorSelectToSVE() local
27759 EVT MaskContainerVT = getContainerForFixedLengthVector(DAG, MaskVT); in LowerFixedLengthVectorSelectToSVE()
|