Searched refs:InsnType (Results 1 – 3 of 3) sorted by relevance
| /src/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 388 template <typename InsnType>
389 static DecodeStatus DecodeINSVE_DF(MCInst &MI, InsnType insn, uint64_t Address,
392 template <typename InsnType>
393 static DecodeStatus DecodeDAHIDATIMMR6(MCInst &MI, InsnType insn,
397 template <typename InsnType>
398 static DecodeStatus DecodeDAHIDATI(MCInst &MI, InsnType insn, uint64_t Address,
401 template <typename InsnType>
402 static DecodeStatus DecodeAddiGroupBranch(MCInst &MI, InsnType insn,
406 template <typename InsnType>
407 static DecodeStatus DecodePOP35GroupBranchMMR6(MCInst &MI, InsnType insn,
[all …]
|
| /src/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.h | 131 template <typename InsnType>
132 DecodeStatus tryDecodeInst(const uint8_t *Table, MCInst &MI, InsnType Inst, in tryDecodeInst()
158 template <typename InsnType>
160 MCInst &MI, InsnType Inst, uint64_t Address, in tryDecodeInst()
|
| /src/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.cpp | 464 unsigned InsnType = HexagonMCInstrInfo::getType(MCII, MI); in getFixupNoBits() local
467 if (InsnType == HexagonII::TypeEXTENDER) { in getFixupNoBits()
|