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Searched refs:CreateRegs (Results 1 – 7 of 7) sorted by relevance

/src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DFunctionLoweringInfo.h214 Register CreateRegs(const Value *V);
216 Register CreateRegs(Type *Ty, bool isDivergent = false);
/src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp382 Register FunctionLoweringInfo::CreateRegs(Type *Ty, bool isDivergent) { in CreateRegs() function in FunctionLoweringInfo
399 Register FunctionLoweringInfo::CreateRegs(const Value *V) { in CreateRegs() function in FunctionLoweringInfo
400 return CreateRegs(V->getType(), UA && UA->isDivergent(V) && in CreateRegs()
411 return R = CreateRegs(V); in InitializeRegForValue()
H A DStatepointLowering.cpp896 Register Reg = FuncInfo.CreateRegs(RetTy); in LowerAsSTATEPOINT()
1129 Register Reg = FuncInfo.CreateRegs(RetTy); in LowerStatepoint()
H A DSelectionDAGISel.cpp1794 R = FuncInfo->CreateRegs(Inst); in SelectAllBasicBlocks()
H A DSelectionDAGBuilder.cpp11860 RegOut = FuncInfo.CreateRegs(C); in HandlePHINodesInSuccessorBlocks()
11879 Reg = FuncInfo.CreateRegs(PHIOp); in HandlePHINodesInSuccessorBlocks()
/src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp3588 Register ResultReg = FuncInfo.CreateRegs(CLI.RetTy); in fastLowerCall()
/src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp3117 Register ResultReg = FuncInfo.CreateRegs(CLI.RetTy); in finishCall()