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Searched refs:icache (Results 1 – 7 of 7) sorted by relevance

/qemu/pc-bios/dtb/
H A Dpetalogix-ml605.dts53 xlnx,allow-icache-wr = < 0x01 >;
87 xlnx,icache-always-used = < 0x01 >;
88 xlnx,icache-data-width = < 0x00 >;
89 xlnx,icache-force-tag-lutram = < 0x00 >;
90 xlnx,icache-interface = < 0x00 >;
91 xlnx,icache-line-len = < 0x08 >;
92 xlnx,icache-streams = < 0x00 >;
93 xlnx,icache-use-fsl = < 0x00 >;
94 xlnx,icache-victims = < 0x00 >;
125 xlnx,use-icache = < 0x01 >;
H A Dpetalogix-s3adsp1800.dts48 xlnx,allow-icache-wr = <0x01>;
73 xlnx,icache-always-used = <0x00>;
74 xlnx,icache-line-len = <0x04>;
75 xlnx,icache-use-fsl = <0x01>;
103 xlnx,use-icache = <0x01>;
/qemu/contrib/plugins/
H A Dcache.c606 Cache *icache, *dcache, *l2_cache = NULL; in log_stats() local
621 icache = l1_icaches[i]; in log_stats()
624 icache->accesses, icache->misses, in log_stats()
/qemu/target/mips/
H A Dcpu-defs.c.inc82 no virtual icache, uncached coherency. */
376 no virtual icache, uncached coherency. */
553 /* No L2 cache, icache size 8k, dcache size 8k, uncached coherency. */
575 /* No L2 cache, icache size 8k, dcache size 8k, uncached coherency. */
/qemu/docs/about/
H A Demulation.rst734 - Print top N icache and dcache thrashing instructions along with
754 - Sets the number of cores for which we maintain separate icache
/qemu/tcg/s390x/
H A Dtcg-target.c.inc2263 /* no need to flush icache explicitly */
/qemu/tcg/i386/
H A Dtcg-target.c.inc2668 /* no need to flush icache explicitly */