| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mq-phanbell.dts | 395 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 412 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 429 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 448 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 460 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 472 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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| H A D | imx8mq-tqma8mq-mba8mx.dts | 261 fsl,pins = <MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0xc1>; 306 <MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1>; 316 <MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1>; 326 <MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1>;
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| H A D | imx8mq-kontron-pitx-imx8m.dts | 518 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 535 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 552 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 571 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 583 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 595 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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| H A D | imx8mq-hummingboard-pulse.dts | 237 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 249 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 261 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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| H A D | imx8mq-sr-som.dtsi | 274 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 291 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 308 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
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| H A D | imx8mq-zii-ultra.dtsi | 787 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 804 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 821 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 833 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 845 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 857 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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| H A D | imx8mq-evk.dts | 663 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 680 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 697 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 715 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 727 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 739 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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| H A D | imx8mq-tqma8mq.dtsi | 326 <MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1>; 341 <MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1>; 356 <MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1>;
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| H A D | imx8mp-venice-gw72xx.dtsi | 376 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 388 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 400 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
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| H A D | imx8mq-pico-pi.dts | 385 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 397 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 409 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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| H A D | imx8mp-venice-gw73xx.dtsi | 429 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 441 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 453 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
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| H A D | imx8mp-navqp.dts | 384 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 396 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 408 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
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| H A D | imx8mp-venice-gw82xx.dtsi | 494 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 506 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 518 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
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| H A D | imx8mp-debix-som-a-bmb-08.dts | 547 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 559 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 571 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
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| H A D | imx8mq-librem5.dtsi | 717 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 734 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 751 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 764 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1 777 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1 790 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
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| H A D | imx8mp-edm-g.dtsi | 691 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 703 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 715 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
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| H A D | imx8mp-msc-sm2s.dtsi | 759 <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1>; 775 <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1>; 786 <MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1>;
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| H A D | imx8mq-thor96.dts | 542 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1 554 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
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| H A D | imx8mq-librem5-devkit.dts | 768 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 785 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1 802 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
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| H A D | imx8mq-nitrogen-som.dtsi | 239 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
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| /linux/drivers/scsi/aic7xxx/ |
| H A D | aic79xx_seq.h_shipped | 19 0x01, 0x34, 0xc1, 0x31, 21 0x01, 0x35, 0xc1, 0x31, 105 0xff, 0x53, 0xc1, 0x19, 108 0x01, 0x52, 0xc1, 0x31, 131 0x01, 0x92, 0xc1, 0x31, 158 0x01, 0x44, 0xc1, 0x31, 252 0x01, 0x62, 0xc1, 0x31, 286 0x01, 0x3c, 0xc1, 0x31, 369 0x4c, 0x3a, 0xc1, 0x28, 388 0xc0, 0x3a, 0xc1, 0x09, [all …]
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| /linux/arch/sparc/include/asm/ |
| H A D | smp_32.h | 71 static inline void xc1(void *func, unsigned long arg1) in xc1() function
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| /linux/Documentation/devicetree/bindings/mailbox/ |
| H A D | hisilicon,hi3660-mailbox.txt | 29 <0x0 0xc1 0x4>;
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| /linux/Documentation/translations/zh_CN/mm/ |
| H A D | page_owner.rst | 79 igmp_net_init+0xc1/0x130
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| /linux/arch/sparc/mm/ |
| H A D | srmmu.c | 1629 xc1(local_ops->page_for_dma, page); in smp_flush_page_for_dma() 1654 xc1(local_ops->cache_mm, (unsigned long)mm); in smp_flush_cache_mm() 1663 xc1(local_ops->tlb_mm, (unsigned long)mm); in smp_flush_tlb_mm() 1731 xc1(local_ops->page_to_ram, page); in smp_flush_page_to_ram()
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