| /linux/drivers/gpu/drm/amd/display/dc/basics/ |
| H A D | dc_common.c | 66 if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe)) in is_upper_pipe_tree_visible()
75 if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe)) in is_pipe_tree_visible()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_mall_phantom.c | 54 if (pipe->stream && pipe->plane_state && !pipe->top_pipe && !pipe->prev_odm_pipe && in dml2_helper_calculate_num_ways_for_subvp()
123 pipe->top_pipe = NULL; in merge_pipes_for_subvp()
129 } else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) { in merge_pipes_for_subvp()
130 struct pipe_ctx *top_pipe = pipe->top_pipe; in merge_pipes_for_subvp() local
133 top_pipe->bottom_pipe = bottom_pipe; in merge_pipes_for_subvp()
135 bottom_pipe->top_pipe = top_pipe; in merge_pipes_for_subvp()
137 pipe->top_pipe = NULL; in merge_pipes_for_subvp()
195 if (pipe->stream && !pipe->top_pipe) { in get_num_free_pipes()
256 if (pipe->plane_state && !pipe->top_pipe && in assign_subvp_pipe()
320 if (pipe->stream && !pipe->top_pipe && in enough_pipes_for_subvp()
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| H A D | dml2_dc_resource_mgmt.c | 115 if (!state->res_ctx.pipe_ctx[i].prev_odm_pipe && !state->res_ctx.pipe_ctx[i].top_pipe) in find_master_pipe_of_stream()
158 && (!pipe->top_pipe || pipe->top_pipe->plane_state != pipe->plane_state)) { in find_pipes_assigned_to_plane()
562 struct pipe_ctx *top_pipe) in add_plane_to_blend_tree() argument
567 if (top_pipe) in add_plane_to_blend_tree()
568 …top_pipe->bottom_pipe = &state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]]; in add_plane_to_blend_tree()
572 state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]].top_pipe = top_pipe; in add_plane_to_blend_tree()
575 top_pipe = &state->res_ctx.pipe_ctx[pipe_pool->pipes_assigned_to_plane[odm_slice][i]]; in add_plane_to_blend_tree()
580 return top_pipe; in add_plane_to_blend_tree()
591 …if (pipe->stream && pipe->stream->stream_id == stream_id && !pipe->top_pipe && !pipe->prev_odm_pip… in find_pipes_assigned_to_stream()
724 if (pipe->top_pipe) in remove_pipes_from_blend_trees()
[all …]
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| H A D | dml2_utils.c | 348 (context->res_ctx.pipe_ctx[dc_pipe_ctx_index].top_pipe == NULL || in dml2_calculate_rq_and_dlg_params()
349 …pe_ctx_index].plane_state != context->res_ctx.pipe_ctx[dc_pipe_ctx_index].top_pipe->plane_state) && in dml2_calculate_rq_and_dlg_params()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 1422 if (pipe_ctx->top_pipe) in dcn20_add_dsc_to_stream_resource()
1453 if (new_ctx->res_ctx.pipe_ctx[i].stream == dc_stream && !new_ctx->res_ctx.pipe_ctx[i].top_pipe) { in remove_dsc_from_stream_resource()
1536 if (prev_odm_pipe->top_pipe && prev_odm_pipe->top_pipe->next_odm_pipe) { in dcn20_split_stream_for_odm()
1537 prev_odm_pipe->top_pipe->next_odm_pipe->bottom_pipe = next_odm_pipe; in dcn20_split_stream_for_odm()
1538 next_odm_pipe->top_pipe = prev_odm_pipe->top_pipe->next_odm_pipe; in dcn20_split_stream_for_odm()
1541 prev_odm_pipe->bottom_pipe->next_odm_pipe->top_pipe = next_odm_pipe; in dcn20_split_stream_for_odm()
1554 if (!next_odm_pipe->top_pipe) in dcn20_split_stream_for_odm()
1557 next_odm_pipe->stream_res.opp = next_odm_pipe->top_pipe->stream_res.opp; in dcn20_split_stream_for_odm()
1558 if (next_odm_pipe->stream->timing.flags.DSC == 1 && !next_odm_pipe->top_pipe) { in dcn20_split_stream_for_odm()
1591 secondary_pipe->bottom_pipe->top_pipe = secondary_pipe; in dcn20_split_stream_for_mpc()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource_helpers.c | 129 pipe->top_pipe = NULL; in dcn32_merge_pipes_for_subvp()
135 } else if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) { in dcn32_merge_pipes_for_subvp()
136 struct pipe_ctx *top_pipe = pipe->top_pipe; in dcn32_merge_pipes_for_subvp() local
139 top_pipe->bottom_pipe = bottom_pipe; in dcn32_merge_pipes_for_subvp()
141 bottom_pipe->top_pipe = top_pipe; in dcn32_merge_pipes_for_subvp()
143 pipe->top_pipe = NULL; in dcn32_merge_pipes_for_subvp()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 1632 if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->plane_state == plane_state) { in resource_build_scaling_params()
1699 for (test_pipe = pipe_ctx->top_pipe; test_pipe; in resource_can_pipe_disable_cursor()
1700 test_pipe = test_pipe->top_pipe) { in resource_can_pipe_disable_cursor()
1718 for (split_pipe = pipe_ctx->top_pipe; split_pipe; in resource_can_pipe_disable_cursor()
1719 split_pipe = split_pipe->top_pipe) in resource_can_pipe_disable_cursor()
1981 !pipe_ctx->top_pipe && in resource_is_pipe_type()
1984 return !pipe_ctx->top_pipe && pipe_ctx->stream; in resource_is_pipe_type()
2063 pipe->top_pipe->plane_state != plane) in resource_get_dpp_pipes_for_plane()
2097 while (opp_head->top_pipe) in resource_get_opp_head()
2098 opp_head = opp_head->top_pipe; in resource_get_opp_head()
[all …]
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| H A D | dc_hw_sequencer.c | 331 struct pipe_ctx *top_pipe = pipe_ctx; in get_mpctree_visual_confirm_color() local
333 while (top_pipe->top_pipe) in get_mpctree_visual_confirm_color()
334 top_pipe = top_pipe->top_pipe; in get_mpctree_visual_confirm_color()
336 *color = pipe_colors[top_pipe->pipe_idx]; in get_mpctree_visual_confirm_color()
399 while (top_pipe_ctx->top_pipe != NULL) in get_hdr_visual_confirm_color()
400 top_pipe_ctx = top_pipe_ctx->top_pipe; in get_hdr_visual_confirm_color()
2321 struct pipe_ctx *top_pipe = pipe_ctx; in hwss_dsc_calculate_and_set_config() local
2334 while (top_pipe->prev_odm_pipe) in hwss_dsc_calculate_and_set_config()
2335 top_pipe = top_pipe->prev_odm_pipe; in hwss_dsc_calculate_and_set_config()
2337 …dsc_cfg.pic_width = (stream->timing.h_addressable + top_pipe->dsc_padding_params.dsc_hactive_paddi… in hwss_dsc_calculate_and_set_config()
[all …]
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| H A D | dc_state.c | 154 if (cur_pipe->top_pipe) in dc_state_copy_internal()
155 cur_pipe->top_pipe = &dst_state->res_ctx.pipe_ctx[cur_pipe->top_pipe->pipe_idx]; in dc_state_copy_internal()
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| H A D | dc.c | 605 if (pipe->stream == stream && !pipe->top_pipe && !pipe->prev_odm_pipe) in dc_stream_forward_crc_window()
671 if (pipe->stream == stream && !pipe->top_pipe && !pipe->prev_odm_pipe) in dc_stream_forward_multiple_crc_window()
1343 if ((context->res_ctx.pipe_ctx[i].top_pipe) && in disable_dangling_plane()
1344 (dc->current_state->res_ctx.pipe_ctx[i].top_pipe)) in disable_dangling_plane()
1345 pipe_split_change = context->res_ctx.pipe_ctx[i].top_pipe->pipe_idx != in disable_dangling_plane()
1346 dc->current_state->res_ctx.pipe_ctx[i].top_pipe->pipe_idx; in disable_dangling_plane()
1348 pipe_split_change = context->res_ctx.pipe_ctx[i].top_pipe != in disable_dangling_plane()
1349 dc->current_state->res_ctx.pipe_ctx[i].top_pipe; in disable_dangling_plane()
1361 if (old_stream && !dc->current_state->res_ctx.pipe_ctx[i].top_pipe && in disable_dangling_plane()
1637 || ctx->res_ctx.pipe_ctx[i].top_pipe in program_timing_sync()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1579 if (pri_pipe->top_pipe && pri_pipe->top_pipe->next_odm_pipe) { in dcn30_split_stream_for_mpc_or_odm()
1580 pri_pipe->top_pipe->next_odm_pipe->bottom_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm()
1581 sec_pipe->top_pipe = pri_pipe->top_pipe->next_odm_pipe; in dcn30_split_stream_for_mpc_or_odm()
1584 pri_pipe->bottom_pipe->next_odm_pipe->top_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm()
1590 if (!sec_pipe->top_pipe) in dcn30_split_stream_for_mpc_or_odm()
1593 sec_pipe->stream_res.opp = sec_pipe->top_pipe->stream_res.opp; in dcn30_split_stream_for_mpc_or_odm()
1604 sec_pipe->bottom_pipe->top_pipe = sec_pipe; in dcn30_split_stream_for_mpc_or_odm()
1607 sec_pipe->top_pipe = pri_pipe; in dcn30_split_stream_for_mpc_or_odm()
1630 if (dc->current_state->res_ctx.pipe_ctx[i].top_pipe == NULL in dcn30_find_split_pipe()
1772 pipe->top_pipe = NULL; in dcn30_internal_validate_bw()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 567 if (pipe->stream && !pipe->top_pipe) { in dcn32_get_num_free_pipes()
628 …if (pipe->plane_state && !pipe->top_pipe && !pipe->prev_odm_pipe && !dcn32_is_center_timing(pipe) … in dcn32_assign_subvp_pipe()
744 if (phantom && pipe->stream && pipe->plane_state && !pipe->top_pipe && in subvp_subvp_schedulable()
1000 if (pipe->plane_state && !pipe->top_pipe && in subvp_subvp_admissable()
1055 if (pipe->plane_state && !pipe->top_pipe) { in subvp_validate_static_schedulability()
1742 (context->res_ctx.pipe_ctx[i].top_pipe == NULL || in dcn32_calculate_dlg_params()
1743 … context->res_ctx.pipe_ctx[i].plane_state != context->res_ctx.pipe_ctx[i].top_pipe->plane_state) && in dcn32_calculate_dlg_params()
1824 if (dc->current_state->res_ctx.pipe_ctx[i].top_pipe == NULL in dcn32_find_split_pipe()
1900 if (pri_pipe->top_pipe && pri_pipe->top_pipe->next_odm_pipe) { in dcn32_split_stream_for_mpc_or_odm()
1901 pri_pipe->top_pipe->next_odm_pipe->bottom_pipe = sec_pipe; in dcn32_split_stream_for_mpc_or_odm()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 846 if (!pipe_ctx->top_pipe in dcn35_enable_plane()
887 pipe_ctx->top_pipe = NULL; in dcn35_plane_atomic_disable()
967 if (!pipe_ctx->top_pipe && pipe_ctx->plane_res.hubp && in dcn35_calc_blocks_to_gate()
1123 if (new_pipe->stream_res.dsc && !new_pipe->top_pipe && in dcn35_calc_blocks_to_ungate()
1623 const struct pipe_ctx *top_pipe = resource_get_otg_master(pipe); in dcn35_begin_cursor_offload_update() local
1626 if (!top_pipe) in dcn35_begin_cursor_offload_update()
1629 stream_idx = top_pipe->pipe_idx; in dcn35_begin_cursor_offload_update()
1647 const struct pipe_ctx *top_pipe = resource_get_otg_master(pipe); in dcn35_commit_cursor_offload_update() local
1656 if (!top_pipe) in dcn35_commit_cursor_offload_update()
1659 stream_idx = top_pipe->pipe_idx; in dcn35_commit_cursor_offload_update()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 128 if (pipe_ctx->top_pipe == NULL) { in dcn401_program_gamut_remap()
1037 if (pipe_ctx->stream && pipe_ctx->stream->link == link && pipe_ctx->top_pipe == NULL) { in disable_link_output_symclk_on_tx_off()
1110 if ((pipe_ctx->top_pipe != NULL) || (pipe_ctx->bottom_pipe != NULL)) { in dcn401_set_cursor_position()
1193 pipe_ctx->top_pipe && in dcn401_set_cursor_position()
1194 (pipe_ctx == pipe_ctx->top_pipe->bottom_pipe)) { in dcn401_set_cursor_position()
1357 const struct pipe_ctx *top_pipe) in dcn401_wait_for_dcc_meta_propagation() argument
1360 const struct pipe_ctx *pipe_ctx = top_pipe; in dcn401_wait_for_dcc_meta_propagation()
2007 if (pipe_ctx->top_pipe == NULL) { in dcn401_reset_back_end_for_pipe()
2043 pipe_ctx->top_pipe = NULL; in dcn401_reset_back_end_for_pipe()
2067 if (pipe_ctx_old->top_pipe || pipe_ctx_old->prev_odm_pipe) in dcn401_reset_hw_ctx_wrap()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 727 pipe_ctx->top_pipe = NULL; in dcn20_plane_atomic_disable()
849 if (pipe_ctx->top_pipe != NULL) in dcn20_enable_stream_timing()
1029 if (pipe_ctx->top_pipe == NULL in dcn20_set_output_transfer_func()
1365 if (!pipe_ctx->top_pipe in dcn20_enable_plane()
1387 if (!pipe || pipe->top_pipe) in dcn20_pipe_control_lock()
1523 if (!new_pipe->top_pipe && !new_pipe->prev_odm_pipe) { in dcn20_detect_pipe_changes()
1875 for (other_pipe = pipe->top_pipe; other_pipe != NULL; other_pipe = other_pipe->top_pipe) { in dcn20_calculate_vready_offset_for_group()
1933 if (pipe_ctx->update_flags.bits.global_sync && !pipe_ctx->top_pipe in dcn20_program_pipe()
2102 && !context->res_ctx.pipe_ctx[i].top_pipe in dcn20_program_front_end_for_ctx()
2152 if (pipe->plane_state && !pipe->top_pipe) { in dcn20_program_front_end_for_ctx()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 238 if (pipe_ctx->top_pipe || in dcn10_lock_all_pipes()
1163 for (other_pipe = pipe->top_pipe; other_pipe != NULL; other_pipe = other_pipe->top_pipe) { in calculate_vready_offset_for_group()
1192 if (pipe_ctx->top_pipe != NULL) in dcn10_enable_stream_timing()
1325 if (pipe_ctx->top_pipe == NULL) { in dcn10_reset_back_end_for_pipe()
1549 pipe_ctx->top_pipe = NULL; in dcn10_plane_atomic_disable()
1963 if (pipe_ctx_old->top_pipe) in dcn10_reset_hw_ctx_wrap()
1983 bool sec_split = pipe_ctx->top_pipe && in patch_address_for_sbs_tb_stereo()
1984 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
2158 if (!pipe || pipe->top_pipe) in dcn10_pipe_control_lock()
2242 if (!pipe || pipe->top_pipe) in dcn10_cursor_lock()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 312 } else if (pipe->top_pipe != NULL && pipe->top_pipe->plane_state == pipe->plane_state) { in pipe_ctx_to_e2e_pipe_params()
545 secondary_pipe->bottom_pipe->top_pipe = secondary_pipe; in split_stream_across_pipes()
548 secondary_pipe->top_pipe = primary_pipe; in split_stream_across_pipes()
899 if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) in dcn_validate_bandwidth()
1206 if (pipe->top_pipe && pipe->top_pipe->plane_state == pipe->plane_state) in dcn_validate_bandwidth()
1271 hsplit_pipe->bottom_pipe->top_pipe = pipe; in dcn_validate_bandwidth()
1274 hsplit_pipe->top_pipe = NULL; in dcn_validate_bandwidth()
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| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_resource.c | 42 if (pipe->stream && pipe->stream->link && pipe->top_pipe == NULL) { in link_get_cur_link_res()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 63 bool sec_split = pipe_ctx->top_pipe && in patch_address_for_sbs_tb_stereo()
64 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
537 if (pipe->top_pipe) in dcn201_pipe_control_lock()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 1425 if (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state in dcn20_populate_dml_pipes_from_context()
1427 struct pipe_ctx *first_pipe = res_ctx->pipe_ctx[i].top_pipe; in dcn20_populate_dml_pipes_from_context()
1430 while (first_pipe->top_pipe && first_pipe->top_pipe->plane_state in dcn20_populate_dml_pipes_from_context()
1432 first_pipe = first_pipe->top_pipe; in dcn20_populate_dml_pipes_from_context()
1441 pipes[pipe_cnt].pipe.src.hsplit_grp = res_ctx->pipe_ctx[i].top_pipe->pipe_idx; in dcn20_populate_dml_pipes_from_context()
1593 || (res_ctx->pipe_ctx[i].top_pipe && res_ctx->pipe_ctx[i].top_pipe->plane_state == pln) in dcn20_populate_dml_pipes_from_context()
1662 split_pipe = res_ctx->pipe_ctx[i].top_pipe; in dcn20_populate_dml_pipes_from_context()
1665 split_pipe = split_pipe->top_pipe; in dcn20_populate_dml_pipes_from_context()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| H A D | dcn31_hwseq.c | 521 ASSERT(!pipe_ctx->top_pipe); in dcn31_reset_back_end_for_pipe()
555 if (pipe_ctx->top_pipe == NULL) { in dcn31_reset_back_end_for_pipe()
627 if (pipe_ctx_old->top_pipe || pipe_ctx_old->prev_odm_pipe) in dcn31_reset_hw_ctx_wrap()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 2301 if (!pipe_ctx_old->stream || pipe_ctx_old->top_pipe) in dce110_reset_hw_ctx_wrap()
2385 if (pipe_ctx->top_pipe) in dce110_setup_audio_dto()
2423 if (pipe_ctx->top_pipe) in dce110_setup_audio_dto()
2477 if (pipe_ctx->stream == NULL || pipe_ctx->top_pipe) in dce110_apply_ctx_to_hw()
2517 if (pipe_ctx->top_pipe || pipe_ctx->prev_odm_pipe) in dce110_apply_ctx_to_hw()
3149 if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state) in dce110_set_cursor_position()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
| H A D | dce_clk_mgr.c | 177 if (pipe_ctx->top_pipe) in dce_get_max_pixel_clock_for_all_paths()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| H A D | dcn21_resource.c | 881 …if (!pipe->top_pipe && !pipe->plane_state && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) { in dcn21_fast_validate_bw()
895 if (pipe->top_pipe && pipe->plane_state == pipe->top_pipe->plane_state) in dcn21_fast_validate_bw()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | core_types.h | 477 struct pipe_ctx *top_pipe; member
|