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Searched refs:sys_insn (Results 1 – 3 of 3) sorted by relevance

/linux/tools/arch/arm64/include/asm/ !
H A Dsysreg.h44 #define sys_insn sys_reg macro
116 __emit_inst(0xd5000000 | sys_insn(0, 3, 3, (CRm), (op2)) | ((Rt) & 0x1f))
121 #define SYS_DC_ISW sys_insn(1, 0, 7, 6, 2)
122 #define SYS_DC_IGSW sys_insn(1, 0, 7, 6, 4)
123 #define SYS_DC_IGDSW sys_insn(1, 0, 7, 6, 6)
124 #define SYS_DC_CSW sys_insn(1, 0, 7, 10, 2)
125 #define SYS_DC_CGSW sys_insn(1, 0, 7, 10, 4)
126 #define SYS_DC_CGDSW sys_insn(1, 0, 7, 10, 6)
127 #define SYS_DC_CISW sys_insn(1, 0, 7, 14, 2)
128 #define SYS_DC_CIGSW sys_insn(1, 0, 7, 14, 4)
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/linux/arch/arm64/include/asm/ !
H A Dsysreg.h45 #define sys_insn sys_reg macro
119 sys_insn((op0), (op1), (CRn), (CRm), (op2)) | \
127 #define SYS_DC_ISW sys_insn(1, 0, 7, 6, 2)
128 #define SYS_DC_IGSW sys_insn(1, 0, 7, 6, 4)
129 #define SYS_DC_IGDSW sys_insn(1, 0, 7, 6, 6)
130 #define SYS_DC_CSW sys_insn(1, 0, 7, 10, 2)
131 #define SYS_DC_CGSW sys_insn(1, 0, 7, 10, 4)
132 #define SYS_DC_CGDSW sys_insn(1, 0, 7, 10, 6)
133 #define SYS_DC_CISW sys_insn(1, 0, 7, 14, 2)
134 #define SYS_DC_CIGSW sys_insn(1, 0, 7, 14, 4)
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/linux/arch/arm64/kvm/ !
H A Dsys_regs.c3787 u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_at_s1e01()
3798 u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_at_s1e2()
3816 u32 op = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_at_s12()
3843 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_alle1is()
3935 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_vmalls12e1is()
3959 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_ripas2e1is()
4014 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_ipas2e1is()
4040 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_tlbi_el2()
4052 u32 sys_encoding = sys_insn(p->Op0, p->Op1, p->CRn, p->CRm, p->Op2); in handle_tlbi_el1()