| /linux/drivers/gpu/drm/amd/display/dc/dsc/ |
| H A D | rc_calc.c | 48 int slice_height = pps->slice_height; in calc_rc_params() local
60 slice_width, slice_height, in calc_rc_params()
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| H A D | rc_calc_dpi.c | 35 to->slice_height = from->slice_height; in copy_pps_fields()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_vdsc.c | 95 if (vdsc_cfg->slice_height >= 8) in calculate_rc_params()
97 12 + (9 * min(34, vdsc_cfg->slice_height - 8)) / 100; in calculate_rc_params()
99 first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1); in calculate_rc_params()
116 if (vdsc_cfg->slice_height >= 8) in calculate_rc_params()
120 2 * (vdsc_cfg->slice_height - 1); in calculate_rc_params()
124 vdsc_cfg->slice_height - 1); in calculate_rc_params()
245 if (vdsc_cfg->slice_height > 4095) in intel_dsc_slice_dimensions_valid()
247 if (vdsc_cfg->slice_height * vdsc_cfg->slice_width < 15000) in intel_dsc_slice_dimensions_valid()
252 if (vdsc_cfg->slice_height % 2) in intel_dsc_slice_dimensions_valid()
254 if (vdsc_cfg->slice_height > 4094) in intel_dsc_slice_dimensions_valid()
[all …]
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| H A D | intel_vdsc_regs.h | 116 #define DSC_PPS3_SLICE_HEIGHT(slice_height) REG_FIELD_PREP(DSC_PPS3_SLICE_HEIGHT_MASK, slice_heig… argument
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| H A D | intel_dp.c | 1880 int slice_height; in intel_dp_get_slice_height() local
1888 for (slice_height = 108; slice_height <= vactive; slice_height += 2) in intel_dp_get_slice_height()
1889 if (vactive % slice_height == 0) in intel_dp_get_slice_height()
1890 return slice_height; in intel_dp_get_slice_height()
1916 vdsc_cfg->slice_height = intel_dp_get_slice_height(vdsc_cfg->pic_height); in intel_dp_dsc_compute_params()
4171 int slice_height; in intel_dp_pcon_dsc_configure() local
4192 slice_height = intel_dp_pcon_dsc_enc_slice_height(crtc_state); in intel_dp_pcon_dsc_configure()
4193 if (!slice_height) in intel_dp_pcon_dsc_configure()
4208 pps_param[0] = slice_height & 0xFF; in intel_dp_pcon_dsc_configure()
4209 pps_param[1] = slice_height >> 8; in intel_dp_pcon_dsc_configure()
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| H A D | icl_dsi.c | 1647 drm_WARN_ON(display->drm, vdsc_cfg->slice_height < 8); in gen11_dsi_dsc_compute_config()
1649 vdsc_cfg->pic_height % vdsc_cfg->slice_height); in gen11_dsi_dsc_compute_config()
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| H A D | intel_bios.c | 3610 vdsc_cfg->slice_height = dsc->slice_height; in fill_dsc()
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| H A D | intel_psr.c | 1346 vdsc_cfg->slice_height % y_granularity) in psr2_granularity_check()
2709 y_alignment = vdsc_cfg->slice_height; in intel_psr2_sel_fetch_pipe_alignment()
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| H A D | intel_display.c | 5446 PIPE_CONF_CHECK_I(dsc.config.slice_height); in intel_pipe_config_compare()
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| /linux/drivers/gpu/drm/display/ |
| H A D | drm_dsc_helper.c | 149 pps_payload->slice_height = cpu_to_be16(dsc_cfg->slice_height); in drm_dsc_pps_payload_pack()
1356 slice_bits = 8 * vdsc_cfg->slice_chunk_size * vdsc_cfg->slice_height; in drm_dsc_compute_rc_parameters()
1383 if (vdsc_cfg->slice_height > 1) in drm_dsc_compute_rc_parameters()
1390 (vdsc_cfg->slice_height - 1)); in drm_dsc_compute_rc_parameters()
1395 groups_total = groups_per_line * vdsc_cfg->slice_height; in drm_dsc_compute_rc_parameters()
1485 cfg->slice_count, cfg->slice_width, cfg->slice_height, cfg->slice_chunk_size); in drm_dsc_dump_config_main_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dsc/ |
| H A D | rc_calc_fpu.c | 171 int slice_height, in _do_calc_rc_params() argument
197 …rc->first_line_bpg_offset = median3(0, (12 + (int) (0.09 * min(34, slice_height - 8))), (int)((… in _do_calc_rc_params()
202 …rc->first_line_bpg_offset = median3(0, (12 + (int) (0.09 * min(34, slice_height - 8))), (int)((… in _do_calc_rc_params()
208 …rc->first_line_bpg_offset = median3(0, (12 + (int) (0.09 * min(34, slice_height - 8))), (int)((… in _do_calc_rc_params()
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| H A D | rc_calc_fpu.h | 87 int slice_height,
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| /linux/include/drm/display/ |
| H A D | drm_dsc.h | 99 u16 slice_height; member
350 __be16 slice_height; member
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| H A D | dcn20_dsc.c | 305 DC_LOG_DSC("\tslice_height %d", pps->slice_height); in dsc_log_pps()
421 dsc_reg_vals->pps.slice_height = dsc_cfg->pic_height / dsc_cfg->dc_dsc_cfg.num_slices_v; in dsc_prepare_config()
423 ASSERT(dsc_reg_vals->pps.slice_height * dsc_cfg->dc_dsc_cfg.num_slices_v == dsc_cfg->pic_height); in dsc_prepare_config()
424 if (!(dsc_reg_vals->pps.slice_height * dsc_cfg->dc_dsc_cfg.num_slices_v == dsc_cfg->pic_height)) { in dsc_prepare_config()
548 reg_vals->pps.slice_height = 0; in dsc_init_reg_values()
657 SLICE_HEIGHT, reg_vals->pps.slice_height); in dsc_write_to_registers()
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| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_hw_dsc.c | 81 data |= dsc->slice_height; in dpu_hw_dsc_config()
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| H A D | dpu_hw_dsc_1_2.c | 163 ((dsc->slice_height & 0xffff) << 16); in dpu_hw_dsc_config_1_2()
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| /linux/drivers/gpu/drm/panel/ |
| H A D | panel-visionox-r66451.c | 272 dsc->slice_height = 20; in visionox_r66451_probe()
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| H A D | panel-novatek-nt37801.c | 294 ctx->dsc.slice_height = 40; in novatek_nt37801_probe()
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| H A D | panel-samsung-s6e3ha8.c | 294 priv->dsc.slice_height = 40; in s6e3ha8_amb577px01_wqhd_probe()
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| H A D | panel-raydium-rm692e5.c | 326 ctx->dsc.slice_height = 60; in rm692e5_probe()
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| H A D | panel-visionox-rm692e5.c | 400 ctx->dsc.slice_height = 20; in visionox_rm692e5_probe()
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| H A D | dcn401_dsc.c | 271 SLICE_HEIGHT, reg_vals->pps.slice_height); in dsc_write_to_registers()
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| /linux/drivers/gpu/drm/msm/dsi/ |
| H A D | dsi_host.c | 2575 if (pic_height % dsc->slice_height) { in msm_dsi_host_check_dsc()
2577 pic_height, dsc->slice_height); in msm_dsi_host_check_dsc()
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