Home
last modified time | relevance | path

Searched refs:rtw_write32_mask (Results 1 – 21 of 21) sorted by relevance

/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c.c380 rtw_write32_mask(rtwdev, 0x1d58, 0xff8, 0x1ff); in rtw8822c_dac_bb_setting()
381 rtw_write32_mask(rtwdev, 0x1a00, 0x3, 0x2); in rtw8822c_dac_bb_setting()
382 rtw_write32_mask(rtwdev, 0x1a14, 0x300, 0x3); in rtw8822c_dac_bb_setting()
384 rtw_write32_mask(rtwdev, 0x180c, 0x3, 0x0); in rtw8822c_dac_bb_setting()
385 rtw_write32_mask(rtwdev, 0x410c, 0x3, 0x0); in rtw8822c_dac_bb_setting()
390 rtw_write32_mask(rtwdev, 0x1e24, BIT(31), 0x0); in rtw8822c_dac_bb_setting()
391 rtw_write32_mask(rtwdev, 0x1e28, 0xf, 0x3); in rtw8822c_dac_bb_setting()
419 rtw_write32_mask(rtwdev, base_addr + 0x30, BIT(30), 0x0); in rtw8822c_dac_cal_adc()
524 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xf0000000, 0x0); in rtw8822c_dac_cal_step2()
525 rtw_write32_mask(rtwdev, base_addr + 0xc0, 0xf, 0x8); in rtw8822c_dac_cal_step2()
[all …]
H A Drtw88xxa.c524 rtw_write32_mask(rtwdev, REG_RRSR, 0xfffff, 0xffff1); in rtw88xxa_init_adaptive_ctrl()
549 rtw_write32_mask(rtwdev, REG_DWBCN0_CTRL, 0xf0, in rtw88xxau_tx_aggregation()
566 rtw_write32_mask(rtwdev, REG_TBTT_PROHIBIT, 0xfffff, WLAN_TBTT_TIME); in rtw88xxa_init_beacon_parameters()
595 rtw_write32_mask(rtwdev, REG_AFE_CTRL3, 0x7FF80000, in rtw88xxa_phy_bb_config()
598 rtw_write32_mask(rtwdev, REG_AFE_CTRL3, 0x00FFF000, in rtw88xxa_phy_bb_config()
613 rtw_write32_mask(rtwdev, REG_RXPSEL, 0xff, 0x11); in rtw8812a_config_1t()
616 rtw_write32_mask(rtwdev, REG_TXPSEL, MASKLWORD, 0x1111); in rtw8812a_config_1t()
619 rtw_write32_mask(rtwdev, REG_CCK_RX, 0x0c000000, 0x0); in rtw8812a_config_1t()
622 rtw_write32_mask(rtwdev, REG_RX_MCS_LIMIT, 0xc0000060, 0x4); in rtw8812a_config_1t()
625 rtw_write32_mask(rtwdev, REG_3WIRE_SWB, 0xf, 0x4); in rtw8812a_config_1t()
[all …]
H A Drtw8812a.c125 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk_backup_rf()
144 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk_restore_rf()
159 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk_restore_afe()
166 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8812a_iqk_restore_afe()
172 rtw_write32_mask(rtwdev, REG_LSSI_WRITE_A, BIT(7), 1); in rtw8812a_iqk_restore_afe()
173 rtw_write32_mask(rtwdev, REG_IQK_DPD_CFG, BIT(18), 1); in rtw8812a_iqk_restore_afe()
174 rtw_write32_mask(rtwdev, REG_IQK_DPD_CFG, BIT(29), 1); in rtw8812a_iqk_restore_afe()
175 rtw_write32_mask(rtwdev, REG_CFG_PMPD, BIT(29), 1); in rtw8812a_iqk_restore_afe()
181 rtw_write32_mask(rtwdev, REG_LSSI_WRITE_B, BIT(7), 1); in rtw8812a_iqk_restore_afe()
182 rtw_write32_mask(rtwdev, REG_BPBDB, BIT(18), 1); in rtw8812a_iqk_restore_afe()
[all …]
H A Drtw8822b.c89 rtw_write32_mask(rtwdev, 0x64, BIT(29) | BIT(28), 0x3); in rtw8822b_phy_rfe_init()
90 rtw_write32_mask(rtwdev, 0x4c, BIT(26) | BIT(25), 0x0); in rtw8822b_phy_rfe_init()
91 rtw_write32_mask(rtwdev, 0x40, BIT(2), 0x1); in rtw8822b_phy_rfe_init()
94 rtw_write32_mask(rtwdev, 0x1990, 0x3f, 0x30); in rtw8822b_phy_rfe_init()
95 rtw_write32_mask(rtwdev, 0x1990, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
98 rtw_write32_mask(rtwdev, 0x974, 0x3f, 0x3f); in rtw8822b_phy_rfe_init()
99 rtw_write32_mask(rtwdev, 0x974, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
171 rtw_write32_mask(rtwdev, 0x24, 0x7e000000, crystal_cap); in rtw8822b_phy_set_param()
172 rtw_write32_mask(rtwdev, 0x28, 0x7e, crystal_cap); in rtw8822b_phy_set_param()
479 rtw_write32_mask(rtwdev, REG_CCASEL, MASKDWORD, reg82c); in rtw8822b_set_channel_cca()
[all …]
H A Drtw8814a.c187 rtw_write32_mask(rtwdev, 0x1994, 0xf, 0xf); in rtw8814a_init_rfe_reg()
190 rtw_write32_mask(rtwdev, 0x1994, 0xf, 0xf); in rtw8814a_init_rfe_reg()
260 rtw_write32_mask(rtwdev, REG_CCK_RX, 0xf0000000, 0x4); in rtw8814a_config_trx_path()
262 rtw_write32_mask(rtwdev, REG_CCK_RX, 0x0f000000, 0x5); in rtw8814a_config_trx_path()
270 rtw_write32_mask(rtwdev, REG_RXSB, BIT_RXSB_ANA_DIV, 0x0); in rtw8814a_config_cck_rx_antenna_init()
272 rtw_write32_mask(rtwdev, REG_CCA, BIT_CCA_CO, 0); in rtw8814a_config_cck_rx_antenna_init()
274 rtw_write32_mask(rtwdev, REG_ANTSEL, BIT_ANT_BYCO, 0); in rtw8814a_config_cck_rx_antenna_init()
276 rtw_write32_mask(rtwdev, REG_PRECTRL, BIT_DIS_CO_PATHSEL, 0); in rtw8814a_config_cck_rx_antenna_init()
278 rtw_write32_mask(rtwdev, REG_CCA_MF, BIT_MBC_WIN, 1); in rtw8814a_config_cck_rx_antenna_init()
280 rtw_write32_mask(rtwdev, REG_CCKTX, BIT_CMB_CCA_2R, 1); in rtw8814a_config_cck_rx_antenna_init()
[all …]
H A Drtw8821a.c63 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8821a_iqk_backup_rf()
78 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8821a_iqk_restore_rf()
91 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8821a_iqk_restore_afe()
98 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8821a_iqk_restore_afe()
115 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8821a_iqk_rx_fill()
117 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_A, in rtw8821a_iqk_rx_fill()
119 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_A, in rtw8821a_iqk_rx_fill()
127 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8821a_iqk_tx_fill()
132 rtw_write32_mask(rtwdev, REG_IQC_Y, 0x000007ff, tx_y); in rtw8821a_iqk_tx_fill()
133 rtw_write32_mask(rtwdev, REG_IQC_X, 0x000007ff, tx_x); in rtw8821a_iqk_tx_fill()
[all …]
H A Drtw8821c.c189 rtw_write32_mask(rtwdev, REG_AFE_XTAL_CTRL, 0x7e000000, crystal_cap); in rtw8821c_phy_set_param()
190 rtw_write32_mask(rtwdev, REG_AFE_PLL_CTRL, 0x7e, crystal_cap); in rtw8821c_phy_set_param()
191 rtw_write32_mask(rtwdev, REG_CCK0_FAREPORT, BIT(18) | BIT(22), 0); in rtw8821c_phy_set_param()
289 rtw_write32_mask(rtwdev, REG_ENRXCCA, MASKBYTE2, BTG_CCA); in rtw8821c_switch_rf_set()
290 rtw_write32_mask(rtwdev, REG_ENTXCCK, MASKLWORD, BTG_LNA); in rtw8821c_switch_rf_set()
295 rtw_write32_mask(rtwdev, REG_ENRXCCA, MASKBYTE2, WLG_CCA); in rtw8821c_switch_rf_set()
296 rtw_write32_mask(rtwdev, REG_ENTXCCK, MASKLWORD, WLG_LNA); in rtw8821c_switch_rf_set()
365 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8821c_set_channel_rxdfir()
366 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2); in rtw8821c_set_channel_rxdfir()
367 rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0); in rtw8821c_set_channel_rxdfir()
[all …]
H A Drtw8723d.c105 rtw_write32_mask(rtwdev, REG_AFE_CTRL3, BIT_MASK_XTAL, in rtw8723d_phy_set_param()
150 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x50); in rtw8723d_phy_set_param()
151 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x20); in rtw8723d_phy_set_param()
260 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0x1f); in rtw8723d_cfg_notch()
261 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x0); in rtw8723d_cfg_notch()
266 rtw_write32_mask(rtwdev, REG_OFDM1_CFOTRK, BIT_EN_CFOTRK, 0x0); in rtw8723d_cfg_notch()
272 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0xb); in rtw8723d_cfg_notch()
273 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x1); in rtw8723d_cfg_notch()
278 rtw_write32_mask(rtwdev, REG_OFDM1_CFOTRK, BIT_EN_CFOTRK, 0x1); in rtw8723d_cfg_notch()
281 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0x5); in rtw8723d_cfg_notch()
[all …]
H A Drtw8703b.c601 rtw_write32_mask(rtwdev, REG_AFE_CTRL3, BIT_MASK_XTAL, in rtw8703b_phy_set_param()
661 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x50); in rtw8703b_phy_set_param()
662 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x20); in rtw8703b_phy_set_param()
689 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0x1f); in rtw8703b_cfg_notch()
690 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x0); in rtw8703b_cfg_notch()
695 rtw_write32_mask(rtwdev, REG_OFDM1_CFOTRK, BIT_EN_CFOTRK, 0x0); in rtw8703b_cfg_notch()
703 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0xb); in rtw8703b_cfg_notch()
704 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x1); in rtw8703b_cfg_notch()
709 rtw_write32_mask(rtwdev, REG_OFDM1_CFOTRK, BIT_EN_CFOTRK, 0x1); in rtw8703b_cfg_notch()
712 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0x4); in rtw8703b_cfg_notch()
[all …]
H A Drtw8723x.c415 rtw_write32_mask(rtwdev, txagc->addr, txagc->mask, pwr_index); in rtw8723x_set_tx_power_index_by_rate()
451 rtw_write32_mask(rtwdev, REG_OFDM_FA_HOLDC_11N, BIT_MASK_OFDM_FA_KEEP, 1); in __rtw8723x_false_alarm_statistics()
452 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_KEEP1, 1); in __rtw8723x_false_alarm_statistics()
453 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_CNT_KEEP, 1); in __rtw8723x_false_alarm_statistics()
454 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KEEP, 1); in __rtw8723x_false_alarm_statistics()
492 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTC_11N, BIT_MASK_OFDM_FA_RST, 1); in __rtw8723x_false_alarm_statistics()
493 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTC_11N, BIT_MASK_OFDM_FA_RST, 0); in __rtw8723x_false_alarm_statistics()
494 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_RST1, 1); in __rtw8723x_false_alarm_statistics()
495 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_RST1, 0); in __rtw8723x_false_alarm_statistics()
496 rtw_write32_mask(rtwdev, REG_OFDM_FA_HOLDC_11N, BIT_MASK_OFDM_FA_KEEP, 0); in __rtw8723x_false_alarm_statistics()
[all …]
H A Defuse.c16 rtw_write32_mask(rtwdev, REG_LDO_EFUSE_CTRL, BIT_MASK_EFUSE_BANK_SEL, in switch_efuse_bank()
130 rtw_write32_mask(rtwdev, REG_EFUSE_CTRL, 0x3ff00, addr); in rtw_read8_physical_efuse()
H A Drtw8822b.h113 rtw_write32_mask(rtwdev, addr, mask, data); in _rtw_write32s_mask()
114 rtw_write32_mask(rtwdev, addr + 0x200, mask, data); in _rtw_write32s_mask()
H A Drtw8821c.h111 rtw_write32_mask(rtwdev, addr, mask, data); in _rtw_write32s_mask()
112 rtw_write32_mask(rtwdev, addr + 0x200, mask, data); in _rtw_write32s_mask()
H A Dphy.c164 rtw_write32_mask(rtwdev, in rtw_phy_set_edcca_th()
168 rtw_write32_mask(rtwdev, in rtw_phy_set_edcca_th()
272 rtw_write32_mask(rtwdev, dig_cck->addr, dig_cck->mask, igi >> 1); in rtw_phy_dig_write()
278 rtw_write32_mask(rtwdev, addr, mask, igi); in rtw_phy_dig_write()
1086 rtw_write32_mask(rtwdev, direct_addr, mask, data); in rtw_phy_write_rf_reg()
1859 rtw_write32_mask(rtwdev, 0x1e24, BIT(17), 0x1); in rtw_load_rfk_table()
1860 rtw_write32_mask(rtwdev, 0x1cd0, BIT(28), 0x1); in rtw_load_rfk_table()
1861 rtw_write32_mask(rtwdev, 0x1cd0, BIT(29), 0x1); in rtw_load_rfk_table()
1862 rtw_write32_mask(rtwdev, 0x1cd0, BIT(30), 0x1); in rtw_load_rfk_table()
1863 rtw_write32_mask(rtwdev, 0x1cd0, BIT(31), 0x0); in rtw_load_rfk_table()
H A Dmac80211.c357 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_TXOP_LMT, params->txop); in __rtw_conf_tx()
358 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_CWMAX, ecw_max); in __rtw_conf_tx()
359 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_CWMIN, ecw_min); in __rtw_conf_tx()
360 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_AIFS, aifs); in __rtw_conf_tx()
H A Drtw8723x.h472 rtw_write32_mask(rtwdev, REG_PAD_CTRL1, BIT_BT_BTG_SEL, 0x1); in rtw8723x_iqk_config_path_ctrl()
504 rtw_write32_mask(rtwdev, REG_LTECOEX_PATH_CONTROL, in rtw8723x_iqk_config_lte_path_gnt()
H A Dhci.h242 rtw_write32_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) in rtw_write32_mask() function
H A Dbf.c379 rtw_write32_mask(rtwdev, REG_BBPSF_CTRL, BIT_MASK_CSI_RATE, in rtw_bf_phy_init()
H A Dmain.c950 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type); in rtw_vif_port_config()
955 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid); in rtw_vif_port_config()
2375 rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1); in rtw_swap_reg_mask()
2376 rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2); in rtw_swap_reg_mask()
H A Dpci.c1296 rtw_write32_mask(rtwdev, REG_PCIE_MIX_CFG, BIT_MDIO_WFLAG_V1, 1); in rtw_mdio_write()
1444 rtw_write32_mask(rtwdev, REG_HCI_MIX_CFG, in rtw_pci_interface_cfg()
1507 rtw_write32_mask(rtwdev, REG_ANAPARSW_MAC_0, BIT_CF_L_V2, 0x1); in rtw_pci_phy_cfg()
H A Dusb.c193 rtw_write32_mask(rtwdev, REG_MCUFW_CTRL, BIT_ROM_PGE, page); in rtw_usb_write_firmware_page()