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Searched refs:regVM_L2_CNTL3 (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v1_2.c256 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL3, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
473 WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL3, 0); in gfxhub_v1_2_xcc_gart_disable()
H A Dmmhub_v1_8.c307 WREG32_SOC15(MMHUB, i, regVM_L2_CNTL3, tmp); in mmhub_v1_8_init_cache_regs()
523 WREG32_SOC15(MMHUB, j, regVM_L2_CNTL3, 0); in mmhub_v1_8_gart_disable()
H A Dmmhub_v1_7.c233 WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL3, tmp); in mmhub_v1_7_init_cache_regs()
399 WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL3, 0); in mmhub_v1_7_gart_disable()
/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_8_0_offset.h2578 #define regVM_L2_CNTL3 … macro
H A Dmmhub_1_7_offset.h4428 #define regVM_L2_CNTL3 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h6694 #define regVM_L2_CNTL3 … macro
H A Dgc_9_4_3_offset.h1488 #define regVM_L2_CNTL3 … macro