Home
last modified time | relevance | path

Searched refs:regVM_L2_CNTL (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v1_2.c230 tmp = RREG32_SOC15(GC, GET_INST(GC, i), regVM_L2_CNTL); in gfxhub_v1_2_xcc_init_cache_regs()
239 WREG32_SOC15_RLC(GC, GET_INST(GC, i), regVM_L2_CNTL, tmp); in gfxhub_v1_2_xcc_init_cache_regs()
470 tmp = RREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL); in gfxhub_v1_2_xcc_gart_disable()
472 WREG32_SOC15(GC, GET_INST(GC, j), regVM_L2_CNTL, tmp); in gfxhub_v1_2_xcc_gart_disable()
H A Dmmhub_v1_8.c276 tmp = RREG32_SOC15(MMHUB, i, regVM_L2_CNTL); in mmhub_v1_8_init_cache_regs()
289 WREG32_SOC15(MMHUB, i, regVM_L2_CNTL, tmp); in mmhub_v1_8_init_cache_regs()
519 tmp = RREG32_SOC15(MMHUB, j, regVM_L2_CNTL); in mmhub_v1_8_gart_disable()
522 WREG32_SOC15(MMHUB, j, regVM_L2_CNTL, tmp); in mmhub_v1_8_gart_disable()
H A Dmmhub_v1_7.c207 tmp = RREG32_SOC15(MMHUB, 0, regVM_L2_CNTL); in mmhub_v1_7_init_cache_regs()
216 WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL, tmp); in mmhub_v1_7_init_cache_regs()
396 tmp = RREG32_SOC15(MMHUB, 0, regVM_L2_CNTL); in mmhub_v1_7_gart_disable()
398 WREG32_SOC15(MMHUB, 0, regVM_L2_CNTL, tmp); in mmhub_v1_7_gart_disable()
/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_8_0_offset.h2574 #define regVM_L2_CNTL … macro
H A Dmmhub_1_7_offset.h4424 #define regVM_L2_CNTL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h6690 #define regVM_L2_CNTL … macro
H A Dgc_9_4_3_offset.h1484 #define regVM_L2_CNTL … macro