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Searched refs:pll3 (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/clk/sunxi/
H A DMakefile18 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun4i-pll3.o
/linux/sound/soc/codecs/
H A Dfs-amp-lib.h129 u16 pll3; member
H A Dfs210x.c685 ret |= fs210x_reg_write(fs210x, FS210X_A3H_PLLCTRL3, pll_div->pll3); in fs210x_set_hw_params()
/linux/drivers/gpu/drm/tegra/
H A Dsor.c371 unsigned int pll3; member
2292 value = tegra_sor_readl(sor, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2294 tegra_sor_writel(sor, value, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2512 value = tegra_sor_readl(sor, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2521 tegra_sor_writel(sor, value, sor->soc->regs->pll3); in tegra_sor_hdmi_enable()
2775 value = tegra_sor_readl(sor, sor->soc->regs->pll3); in tegra_sor_dp_enable()
2777 tegra_sor_writel(sor, value, sor->soc->regs->pll3); in tegra_sor_dp_enable()
3288 .pll3 = 0x1a,
3460 .pll3 = 0x1a,
3521 .pll3 = 0x166,
[all …]
/linux/drivers/clk/qcom/
H A Dgcc-ipq806x.c61 static struct clk_pll pll3 = { variable
324 { .hw = &pll3.clkr.hw },
385 { .hw = &pll3.clkr.hw },
3069 [PLL3] = &pll3.clkr,
H A Dgcc-msm8960.c28 static struct clk_pll pll3 = { variable
327 { .hw = &pll3.clkr.hw },
3242 [PLL3] = &pll3.clkr,
3470 [PLL3] = &pll3.clkr,
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8960.dtsi408 "pll3",
H A Dqcom-apq8064.dtsi775 "pll3",
/linux/arch/arm/boot/dts/renesas/
H A Dsh73a0.dtsi651 "pll3", "dsi0phy", "dsi1phy",