| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| H A D | dcn20_dsc.c | 172 if (dsc_cfg->pic_width > dsc20->max_image_width) in dsc2_validate_stream()
304 DC_LOG_DSC("\tpic_width %d", pps->pic_width); in dsc_log_pps()
380 ASSERT(dsc_cfg->pic_width); in dsc_prepare_config()
391 !dsc_cfg->pic_width || !dsc_cfg->pic_height || in dsc_prepare_config()
409 dsc_reg_vals->pps.pic_width = dsc_cfg->pic_width; in dsc_prepare_config()
418 …dsc_reg_vals->pps.slice_width = (dsc_cfg->pic_width + dsc_cfg->dsc_padding + dsc_cfg->dc_dsc_cfg.n… in dsc_prepare_config()
545 reg_vals->pps.pic_width = 0; in dsc_init_reg_values()
603 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()
652 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()
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| /linux/include/drm/display/ |
| H A D | drm_dsc.h | 107 u16 pic_width; member
345 __be16 pic_width; member
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/ |
| H A D | rc_calc_dpi.c | 39 to->pic_width = from->pic_width; in copy_pps_fields()
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| H A D | dsc.h | 38 uint32_t pic_width; member
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_vdsc.c | 280 vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay; in intel_dsc_compute_params()
281 vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width, in intel_dsc_compute_params()
512 DSC_PPS2_PIC_WIDTH(vdsc_cfg->pic_width / num_vdsc_instances); in intel_dsc_pps_configure()
561 DSC_PPS16_SLICE_PER_LINE((vdsc_cfg->pic_width / num_vdsc_instances) / in intel_dsc_pps_configure()
948 vdsc_cfg->pic_width = REG_FIELD_GET(DSC_PPS2_PIC_WIDTH_MASK, pps_temp) * num_vdsc_instances; in intel_dsc_get_pps_config()
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| H A D | intel_vdsc_regs.h | 109 #define DSC_PPS2_PIC_WIDTH(pic_width) REG_FIELD_PREP(DSC_PPS2_PIC_WIDTH_MASK, pic_width) argument
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| H A D | icl_dsi.c | 1646 vdsc_cfg->pic_width % vdsc_cfg->slice_width); in gen11_dsi_dsc_compute_config()
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| H A D | intel_display.c | 5443 PIPE_CONF_CHECK_I(dsc.config.pic_width); in intel_pipe_config_compare()
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| /linux/drivers/gpu/drm/display/ |
| H A D | drm_dsc_helper.c | 146 pps_payload->pic_width = cpu_to_be16(dsc_cfg->pic_width); in drm_dsc_pps_payload_pack()
1484 cfg->pic_width, cfg->pic_height, in drm_dsc_dump_config_main_params()
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| /linux/drivers/media/platform/rockchip/rkvdec/ |
| H A D | rkvdec-vdpu383-h264.c | 204 u32 pic_width, pic_height; in assemble_hw_pps() local
241 pic_width = 16 * (sps->pic_width_in_mbs_minus1 + 1); in assemble_hw_pps()
248 hw_ps->sps.pic_width_in_mbs = pic_width; in assemble_hw_pps()
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/ |
| H A D | dcn401_dsc.c | 118 if (dsc_cfg->pic_width > dsc401->max_image_width) in dsc401_validate_stream()
266 PIC_WIDTH, reg_vals->pps.pic_width, in dsc_write_to_registers()
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| /linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_hw_dsc.c | 76 data = dsc->pic_width << 16; in dpu_hw_dsc_config()
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| H A D | dpu_hw_dsc_1_2.c | 157 data = (dsc->pic_width & 0xffff) | in dpu_hw_dsc_config_1_2()
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| H A D | dpu_encoder.c | 2027 int pic_width; in dpu_encoder_prep_dsc() local
2042 pic_width = dsc->pic_width; in dpu_encoder_prep_dsc()
2052 this_frame_slices = pic_width / dsc->slice_width; in dpu_encoder_prep_dsc()
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| /linux/drivers/gpu/drm/msm/dsi/ |
| H A D | dsi_host.c | 1022 dsc->pic_width = mode->hdisplay; in dsi_timing_setup()
1024 DBG("Mode %dx%d\n", dsc->pic_width, dsc->pic_height); in dsi_timing_setup()
2563 int pic_width = mode->hdisplay; in msm_dsi_host_check_dsc() local
2569 if (pic_width % dsc->slice_width) { in msm_dsi_host_check_dsc()
2571 pic_width, dsc->slice_width); in msm_dsi_host_check_dsc()
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| /linux/drivers/media/platform/chips-media/wave5/ |
| H A D | wave5-vpu-dec.c | 303 __func__, initial_info->pic_width, initial_info->pic_height, in handle_dynamic_resolution_change()
322 inst->conf_win.width = initial_info->pic_width - in handle_dynamic_resolution_change()
334 initial_info->pic_width, in handle_dynamic_resolution_change()
345 initial_info->pic_width, in handle_dynamic_resolution_change()
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| H A D | wave5-vpu-enc.c | 1174 open_param->pic_width = inst->conf_win.width; in wave5_set_enc_openparam()
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| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_dpms.c | 836 …dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->dsc_padding_params.dsc_hactive_paddi… in link_set_dsc_on_stream()
860 dsc_cfg.pic_width *= opp_cnt; in link_set_dsc_on_stream()
970 …dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h… in link_set_dsc_pps_packet()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.c | 359 …dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream()
379 dsc_cfg.pic_width *= opp_cnt; in update_dsc_on_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/ |
| H A D | dcn32_hwseq.c | 1064 …dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->dsc_padding_params.dsc_hactive_paddi… in dcn32_update_dsc_on_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 1697 …dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->dsc_padding_params.dsc_hactive_paddi… in dcn20_validate_dsc()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 2337 …dsc_cfg.pic_width = (stream->timing.h_addressable + top_pipe->dsc_padding_params.dsc_hactive_paddi… in hwss_dsc_calculate_and_set_config()
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