Searched refs:num_queue_per_pipe (Results 1 – 10 of 10) sorted by relevance
181 .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe, in amdgpu_amdkfd_device_init()202 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_amdkfd_device_init()
75 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in kgd_gfx_v9_get_queue_mask()962 pipe_idx = queue_idx / adev->gfx.mec.num_queue_per_pipe; in get_wave_count()963 queue_slot = queue_idx % adev->gfx.mec.num_queue_per_pipe; in get_wave_count()1043 adev->gfx.mec.num_queue_per_pipe; in kgd_gfx_v9_get_cu_occupancy()
1372 adev->gfx.mec.num_queue_per_pipe; in gfx_v12_0_alloc_ip_dump()1385 adev->gfx.me.num_queue_per_pipe; in gfx_v12_0_alloc_ip_dump()1402 int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */ in gfx_v12_0_sw_init() local1411 adev->gfx.me.num_queue_per_pipe = 8; in gfx_v12_0_sw_init()1414 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v12_0_sw_init()1419 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v12_0_sw_init()1422 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v12_0_sw_init()1459 adev->gfx.mec.num_queue_per_pipe) / 2; in gfx_v12_0_sw_init()1511 for (j = 0; j < num_queue_per_pipe; j++) { in gfx_v12_0_sw_init()1530 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v12_0_sw_init()[all …]
1560 adev->gfx.mec.num_queue_per_pipe; in gfx_v11_0_alloc_ip_dump()1573 adev->gfx.me.num_queue_per_pipe; in gfx_v11_0_alloc_ip_dump()1589 int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */ in gfx_v11_0_sw_init() local1606 adev->gfx.me.num_queue_per_pipe = 2; in gfx_v11_0_sw_init()1609 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v11_0_sw_init()1614 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v11_0_sw_init()1617 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v11_0_sw_init()1790 for (j = 0; j < num_queue_per_pipe; j++) { in gfx_v11_0_sw_init()1809 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v11_0_sw_init()5027 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v11_0_soft_reset()[all …]
4729 adev->gfx.mec.num_queue_per_pipe; in gfx_v10_0_alloc_ip_dump()4742 adev->gfx.me.num_queue_per_pipe; in gfx_v10_0_alloc_ip_dump()4758 int num_queue_per_pipe = 1; /* we only enable 1 KGQ per pipe */ in gfx_v10_0_sw_init() local4770 adev->gfx.me.num_queue_per_pipe = 8; in gfx_v10_0_sw_init()4773 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v10_0_sw_init()4785 adev->gfx.me.num_queue_per_pipe = 2; in gfx_v10_0_sw_init()4788 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v10_0_sw_init()4793 adev->gfx.me.num_queue_per_pipe = 1; in gfx_v10_0_sw_init()4796 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v10_0_sw_init()4923 for (j = 0; j < num_queue_per_pipe; j++) { in gfx_v10_0_sw_init()[all …]
69 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
67 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
114 uint32_t num_queue_per_pipe; member
87 + pipe) * dqm->dev->kfd->shared_resources.num_queue_per_pipe; in is_pipe_enabled()90 for (i = 0; i < dqm->dev->kfd->shared_resources.num_queue_per_pipe; ++i) in is_pipe_enabled()105 return dqm->dev->kfd->shared_resources.num_queue_per_pipe; in get_queues_per_pipe()1711 mec = (i / dqm->dev->kfd->shared_resources.num_queue_per_pipe) in set_sched_resources()1861 num_hw_queue_slots = dqm->dev->kfd->shared_resources.num_queue_per_pipe * in start_cpsch()2160 mec = (i / dqm->dev->kfd->shared_resources.num_queue_per_pipe) in detect_queue_hang()