Searched refs:mec_hdr (Results 1 – 4 of 4) sorted by relevance
2881 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v11_0_config_mec_cache_rs64() local2883 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v11_0_config_mec_cache_rs64()2906 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v11_0_config_mec_cache_rs64()2907 mec_hdr->ucode_start_addr_hi << 30); in gfx_v11_0_config_mec_cache_rs64()2909 mec_hdr->ucode_start_addr_hi >> 2); in gfx_v11_0_config_mec_cache_rs64()2963 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v11_0_config_gfx_rs64() local2966 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v11_0_config_gfx_rs64()3021 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v11_0_config_gfx_rs64()3022 mec_hdr->ucode_start_addr_hi << 30); in gfx_v11_0_config_gfx_rs64()3024 mec_hdr->ucode_start_addr_hi >> 2); in gfx_v11_0_config_gfx_rs64()[all …]
2113 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v12_0_config_gfx_rs64() local2116 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v12_0_config_gfx_rs64()2171 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v12_0_config_gfx_rs64()2172 mec_hdr->ucode_start_addr_hi << 30); in gfx_v12_0_config_gfx_rs64()2174 mec_hdr->ucode_start_addr_hi >> 2); in gfx_v12_0_config_gfx_rs64()2812 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v12_0_cp_compute_load_microcode_rs64() local2824 mec_hdr = (const struct gfx_firmware_header_v2_0 *)adev->gfx.mec_fw->data; in gfx_v12_0_cp_compute_load_microcode_rs64()2825 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v12_0_cp_compute_load_microcode_rs64()2828 le32_to_cpu(mec_hdr->ucode_offset_bytes)); in gfx_v12_0_cp_compute_load_microcode_rs64()2829 fw_ucode_size = le32_to_cpu(mec_hdr->ucode_size_bytes); in gfx_v12_0_cp_compute_load_microcode_rs64()[all …]
4424 const struct gfx_firmware_header_v1_0 *mec_hdr = NULL; in gfx_v10_0_mec_init() local4451 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_mec_init()4454 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_mec_init()4455 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v10_0_mec_init()4457 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v10_0_mec_init()6648 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v10_0_cp_compute_load_microcode() local6659 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_cp_compute_load_microcode()6660 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v10_0_cp_compute_load_microcode()6664 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_compute_load_microcode()6702 for (i = 0; i < mec_hdr->jt_size; i++) in gfx_v10_0_cp_compute_load_microcode()[all …]
4256 const struct gfx_firmware_header_v1_0 *mec_hdr = in cik_cp_compute_load_microcode() local4261 radeon_ucode_print_gfx_hdr(&mec_hdr->header); in cik_cp_compute_load_microcode()4265 (rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in cik_cp_compute_load_microcode()4266 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in cik_cp_compute_load_microcode()4270 WREG32(CP_MEC_ME1_UCODE_ADDR, le32_to_cpu(mec_hdr->header.ucode_version)); in cik_cp_compute_load_microcode()