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Searched refs:mask_set (Results 1 – 10 of 10) sorted by relevance

/linux/arch/x86/mm/pat/
H A Dset_memory.c44 pgprot_t mask_set; member
976 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set); in __should_split_large_page()
1766 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set); in populate_pgd()
1854 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); in __change_page_attr()
1938 alias_cpa.mask_set.pgprot &= ~_PAGE_NX; in cpa_process_alias()
1969 alias_cpa.mask_set.pgprot &= ~_PAGE_NX; in cpa_process_alias()
1993 if (!(pgprot_val(cpa->mask_set) | pgprot_val(cpa->mask_clr)) && in __change_page_attr_set_clr()
2038 pgprot_t mask_set, pgprot_t mask_clr, in change_page_attr_set_clr() argument
2051 mask_set = canon_pgprot(mask_set); in change_page_attr_set_clr()
2053 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split) in change_page_attr_set_clr()
[all …]
/linux/arch/sparc/kernel/
H A Dsun4m_irq.c203 sbus_writel(handler_data->mask, &sun4m_irq_global->mask_set); in sun4m_mask_irq()
413 sbus_writel(SUN4M_INT_E14, &sun4m_irq_global->mask_set); in sun4m_init_timers()
463 sbus_writel(~SUN4M_INT_MASKALL, &sun4m_irq_global->mask_set); in sun4m_init_IRQ()
H A Dirq.h40 u32 mask_set; member
H A Dentry.S739 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
/linux/drivers/pinctrl/mediatek/
H A Dmtk-eint.c37 .mask_set = 0x0c0,
138 eint->regs->mask_set); in mtk_eint_mask()
258 writel_relaxed(~buf[inst][port], reg + eint->regs->mask_set); in mtk_eint_chip_write_mask()
325 mask_reg = eint->base[i] + eint->regs->mask_set; in mtk_eint_hw_init()
383 eint->regs->mask_set); in mtk_eint_irq_handler()
H A Dmtk-eint.h19 unsigned int mask_set; member
H A Dpinctrl-mtk-common.h170 unsigned int mask_set; member
/linux/drivers/irqchip/
H A Dirq-apple-aic.c251 u32 mask_set; member
360 aic_ic_write(ic, ic->info.mask_set + off + MASK_REG(irq), MASK_BIT(irq)); in aic_irq_mask()
1020 irqc->info.mask_set = off; in aic_of_ic_init()
1059 aic_ic_write(irqc, irqc->info.mask_set + off + i * 4, U32_MAX); in aic_of_ic_init()
/linux/drivers/mailbox/
H A Darm_mhuv2.c126 u32 mask_set; member
276 &mhu->recv->ch_wn[priv->ch_wn_idx].mask_set); in mhuv2_doorbell_rx_shutdown()
345 writel_relaxed(0xFFFFFFFF, &mhu->recv->ch_wn[i].mask_set); in mhuv2_data_transfer_rx_shutdown()
1049 writel_relaxed(0xFFFFFFFF, &mhu->recv->ch_wn[i].mask_set); in mhuv2_rx_init()
/linux/drivers/net/ethernet/hisilicon/hns/
H A Dhns_dsaf_main.c798 u32 chnn_num, u32 mask_set) in hns_dsaf_int_xge_msk_set() argument
801 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set); in hns_dsaf_int_xge_msk_set()