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Searched refs:intel_de_posting_read (Results 1 – 22 of 22) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_fdi.c411 intel_de_posting_read(display, SOUTH_CHICKEN1); in cpt_set_fdi_bc_bifurcation()
469 intel_de_posting_read(display, reg); in intel_fdi_normal_train()
521 intel_de_posting_read(display, reg); in ilk_fdi_link_train()
549 intel_de_posting_read(display, FDI_RX_CTL(pipe)); in ilk_fdi_link_train()
602 intel_de_posting_read(display, reg); in gen6_fdi_link_train()
631 intel_de_posting_read(display, reg); in gen6_fdi_link_train()
637 intel_de_posting_read(display, FDI_TX_CTL(pipe)); in gen6_fdi_link_train()
682 intel_de_posting_read(display, reg); in gen6_fdi_link_train()
688 intel_de_posting_read(display, FDI_TX_CTL(pipe)); in gen6_fdi_link_train()
739 intel_de_posting_read(display, reg); in ivb_manual_fdi_link_train()
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H A Dg4x_dp.c216 intel_de_posting_read(display, DP_A); in ilk_edp_pll_on()
231 intel_de_posting_read(display, DP_A); in ilk_edp_pll_on()
249 intel_de_posting_read(display, DP_A); in ilk_edp_pll_off()
429 intel_de_posting_read(display, intel_dp->output_reg); in intel_dp_link_down()
449 intel_de_posting_read(display, intel_dp->output_reg); in intel_dp_link_down()
453 intel_de_posting_read(display, intel_dp->output_reg); in intel_dp_link_down()
600 intel_de_posting_read(display, intel_dp->output_reg); in cpt_set_link_train()
613 intel_de_posting_read(display, intel_dp->output_reg); in cpt_set_idle_link_train()
641 intel_de_posting_read(display, intel_dp->output_reg); in g4x_set_link_train()
654 intel_de_posting_read(display, intel_dp->output_reg); in g4x_set_idle_link_train()
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H A Dintel_display_irq.c36 intel_de_posting_read(display, regs.imr); in irq_reset()
42 intel_de_posting_read(display, regs.iir); in irq_reset()
44 intel_de_posting_read(display, regs.iir); in irq_reset()
61 intel_de_posting_read(display, reg); in assert_iir_is_zero()
63 intel_de_posting_read(display, reg); in assert_iir_is_zero()
73 intel_de_posting_read(display, regs.imr); in irq_init()
79 intel_de_posting_read(display, regs.emr); in error_reset()
82 intel_de_posting_read(display, regs.eir); in error_reset()
84 intel_de_posting_read(display, regs.eir); in error_reset()
91 intel_de_posting_read(display, regs.eir); in error_init()
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H A Dintel_pch_refclk.c623 intel_de_posting_read(display, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
642 intel_de_posting_read(display, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
653 intel_de_posting_read(display, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
667 intel_de_posting_read(display, PCH_DREF_CONTROL); in ilk_init_pch_refclk()
H A Dintel_dkl_phy.c114 intel_de_posting_read(display, DKL_REG_MMIO(reg)); in intel_dkl_phy_posting_read()
H A Dintel_backlight.c513 intel_de_posting_read(display, BLC_PWM_PCH_CTL1); in lpt_enable_backlight()
552 intel_de_posting_read(display, BLC_PWM_CPU_CTL2); in pch_enable_backlight()
566 intel_de_posting_read(display, BLC_PWM_PCH_CTL1); in pch_enable_backlight()
597 intel_de_posting_read(display, BLC_PWM_CTL); in i9xx_enable_backlight()
642 intel_de_posting_read(display, BLC_PWM_CTL2); in i965_enable_backlight()
676 intel_de_posting_read(display, VLV_BLC_PWM_CTL2(pipe)); in vlv_enable_backlight()
727 intel_de_posting_read(display, BXT_BLC_PWM_CTL(panel->backlight.controller)); in bxt_enable_backlight()
758 intel_de_posting_read(display, BXT_BLC_PWM_CTL(panel->backlight.controller)); in cnp_enable_backlight()
H A Dintel_dvo.c197 intel_de_posting_read(display, DVO(port)); in intel_disable_dvo()
214 intel_de_posting_read(display, DVO(port)); in intel_enable_dvo()
H A Dintel_crt.c510 intel_de_posting_read(display, crt->adpa_reg); in ilk_crt_detect_hotplug()
732 intel_de_posting_read(display, in intel_crt_load_detect()
974 intel_de_posting_read(display, crt->adpa_reg); in intel_crt_reset()
H A Dintel_gmbus.c299 intel_de_posting_read(display, bus->gpio_reg); in set_clock()
316 intel_de_posting_read(display, bus->gpio_reg); in set_data()
332 intel_de_posting_read(display, bus->gpio_reg); in ptl_handle_mask_bits()
H A Dintel_de.h67 intel_de_posting_read(struct intel_display *display, i915_reg_t reg) in intel_de_posting_read() function
H A Dhsw_ips.c86 intel_de_posting_read(display, IPS_CTL); in hsw_ips_disable()
H A Dintel_lvds.c330 intel_de_posting_read(display, lvds_encoder->reg); in intel_enable_lvds()
353 intel_de_posting_read(display, lvds_encoder->reg); in intel_disable_lvds()
H A Dicl_dsi.c383 intel_de_posting_read(display, ICL_DSI_ESC_CLK_DIV(port)); in gen11_dsi_program_esc_clk_div()
389 intel_de_posting_read(display, ICL_DPHY_ESC_CLK_DIV(port)); in gen11_dsi_program_esc_clk_div()
396 intel_de_posting_read(display, ADL_MIPIO_DW(port, 8)); in gen11_dsi_program_esc_clk_div()
694 intel_de_posting_read(display, ICL_DPCLKA_CFGCR0); in gen11_dsi_map_pll()
H A Dvlv_dsi_pll.c557 intel_de_posting_read(display, BXT_DSI_PLL_CTL); in bxt_dsi_pll_enable()
H A Dintel_sdvo.c222 intel_de_posting_read(display, intel_sdvo->sdvo_reg); in intel_sdvo_write_sdvox()
229 intel_de_posting_read(display, intel_sdvo->sdvo_reg); in intel_sdvo_write_sdvox()
246 intel_de_posting_read(display, GEN3_SDVOB); in intel_sdvo_write_sdvox()
249 intel_de_posting_read(display, GEN3_SDVOC); in intel_sdvo_write_sdvox()
H A Dintel_display.c490 intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); in intel_enable_transcoder()
3016 intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); in i9xx_set_pipeconf()
3212 intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); in ilk_set_pipeconf()
3243 intel_de_posting_read(display, TRANSCONF(display, cpu_transcoder)); in hsw_set_transconf()
8380 intel_de_posting_read(display, DPLL(display, pipe)); in i830_enable_pipe()
8393 intel_de_posting_read(display, DPLL(display, pipe)); in i830_enable_pipe()
8398 intel_de_posting_read(display, TRANSCONF(display, pipe)); in i830_enable_pipe()
8422 intel_de_posting_read(display, TRANSCONF(display, pipe)); in i830_disable_pipe()
8427 intel_de_posting_read(display, DPLL(display, pipe)); in i830_disable_pipe()
H A Dintel_tv.c1630 intel_de_posting_read(display, TV_DAC); in intel_tv_detect_type()
1662 intel_de_posting_read(display, TV_CTL); in intel_tv_detect_type()
H A Dvlv_dsi.c659 intel_de_posting_read(display, port_ctrl); in intel_dsi_port_enable()
674 intel_de_posting_read(display, port_ctrl); in intel_dsi_port_disable()
H A Dintel_cdclk.c1110 intel_de_posting_read(display, DPLL_CTRL1); in skl_dpll0_enable()
1206 intel_de_posting_read(display, CDCLK_CTL); in skl_set_cdclk()
1221 intel_de_posting_read(display, CDCLK_CTL); in skl_set_cdclk()
H A Dintel_dmc.c438 intel_de_posting_read(display, DC_STATE_DEBUG); in gen9_set_dc_state_debugmask()
H A Dintel_fbc.c618 intel_de_posting_read(display, MSG_FBC_REND_STATE(fbc->id)); in snb_fbc_nuke()
H A Dintel_dp.c5028 intel_de_posting_read(display, reg); in intel_dp_set_infoframes()