Searched refs:in_be64 (Results 1 – 17 of 17) sorted by relevance
174 switch (in_be64(&priv2->mfc_control_RW) & in save_mfc_cntl()177 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) & in save_mfc_cntl()184 in_be64(&priv2->mfc_control_RW) | in save_mfc_cntl()189 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) & in save_mfc_cntl()194 in_be64(&priv2->mfc_control_RW) & in save_mfc_cntl()260 csa->priv2.mfc_control_RW |= in_be64(&priv2->mfc_control_RW) & mask; in save_mfc_stopped_status()304 POLL_WHILE_TRUE(in_be64(&prob->spc_mssync_RW) & MS_SYNC_PENDING); in do_mfc_mssync()342 if ((in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DMA_QUEUES_EMPTY) == 0) { in save_mfc_queues()345 in_be64(&priv2->puq[i].mfc_cq_data0_RW); in save_mfc_queues()347 in_be64(&priv2->puq[i].mfc_cq_data1_RW); in save_mfc_queues()[all …]
92 *data = in_be64(&priv2->puint_mb_R); in spu_hw_ibox_read()141 tmp = in_be64(&priv2->spu_cfg_RW); in spu_hw_signal1_type_set()152 return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 1) != 0); in spu_hw_signal1_type_get()162 tmp = in_be64(&priv2->spu_cfg_RW); in spu_hw_signal2_type_set()173 return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 2) != 0); in spu_hw_signal2_type_get()
110 while ((in_be64(mfc_cntl) & MFC_CNTL_PURGE_DMA_STATUS_MASK) in spu_setup_isolated()
2470 mfc_control_RW = in_be64(&priv2->mfc_control_RW); in spufs_show_ctx()
90 *v = rng_whiten(rng, in_be64(rng->regs)); in pnv_get_random_long()140 val = in_be64(rng->regs); in rng_create()
578 val = in_be64(arva + PNV_OCXL_ATSD_STAT); in pnv_ocxl_tlb_invalidate()588 val = in_be64(arva + PNV_OCXL_ATSD_STAT); in pnv_ocxl_tlb_invalidate()
475 return in_be64(win->hvwc_map+reg); in read_hvwc_reg()
119 *val = in_be64(phb->regs + offset); in pnv_eeh_dbgfs_get()
367 while (in_be64(&spu_pdata(spu)->shadow->spe_execution_status) in ps3_create_spu()513 return in_be64(&spu_pdata(spu)->shadow->mfc_dar_RW); in mfc_dar_get()523 return in_be64(&spu_pdata(spu)->shadow->mfc_dsisr_RW); in mfc_dsisr_get()
192 DEF_MMIO_IN_D(in_be64, 64, ld);197 return swab64(in_be64(addr)); in in_le64()209 static inline u64 in_be64(const volatile u64 __iomem *addr) in in_be64() function452 #define __do_readq_be(addr) in_be64(addr)
415 u64 val = in_be64(addr); in eeh_readq_be()
112 *dsisr = in_be64(spa->reg_dsisr); in read_irq()113 *dar = in_be64(spa->reg_dar); in read_irq()114 reg = in_be64(spa->reg_pe_handle); in read_irq()
403 in_be64(xive_tima + TM_SPC_PULL_POOL_CTX); in xive_native_setup_cpu()440 in_be64(xive_tima + TM_SPC_PULL_POOL_CTX); in xive_native_teardown_cpu()
227 val = in_be64(xd->eoi_mmio + offset); in xive_esb_read()
203 #define fsl_ioread64be(p) in_be64(p)
784 the_card.audio_irq_outlet = in_be64(mapped); in snd_ps3_allocate_irq()
40 val = in_be64(xd->eoi_mmio + offset); in xive_vm_esb_load()