| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | dml_inline_defs.h | 32 static inline double dml_min(double a, double b) in dml_min() function
39 return dml_min(dml_min(a, b), c); in dml_min3()
44 return dml_min(dml_min(a, b), dml_min(c, d)); in dml_min4()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.c | 221 *PSCL_THROUGHPUT = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput * HRatio / in dml32_CalculateSinglePipeDPPCLKAndSCLThroughput()
224 *PSCL_THROUGHPUT = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput); in dml32_CalculateSinglePipeDPPCLKAndSCLThroughput()
227 DPPCLKUsingSingleDPPLuma = PixelClock * dml_max3(VTaps / 6 * dml_min(1, HRatio), HRatio * VRatio / in dml32_CalculateSinglePipeDPPCLKAndSCLThroughput()
239 *PSCL_THROUGHPUT_CHROMA = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput * in dml32_CalculateSinglePipeDPPCLKAndSCLThroughput()
242 *PSCL_THROUGHPUT_CHROMA = dml_min(MaxDCHUBToPSCLThroughput, MaxPSCLToLBThroughput); in dml32_CalculateSinglePipeDPPCLKAndSCLThroughput()
244 DPPCLKUsingSingleDPPChroma = PixelClock * dml_max3(VTapsChroma / 6 * dml_min(1, HRatioChroma), in dml32_CalculateSinglePipeDPPCLKAndSCLThroughput()
753 SwathWidthY[k] = dml_min(SwathWidthdoubleDPPY[k], in dml32_CalculateSwathWidth()
756 SwathWidthY[k] = dml_min(SwathWidthdoubleDPPY[k], in dml32_CalculateSwathWidth()
794 swath_width_luma_ub[k] = dml_min(surface_width_ub_l, in dml32_CalculateSwathWidth()
802 swath_width_luma_ub[k] = dml_min(surface_width_ub_l, in dml32_CalculateSwathWidth()
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| H A D | display_mode_vba_32.c | 792 dml_min(v->VStartupLines, v->MaxVStartupLines[k]), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
842 v->VStartup[k] = dml_min(v->VStartupLines, v->MaxVStartupLines[k]); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1950 …v->MaximumSwathWidthLuma[k] = dml_min(v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.Ma… in dml32_ModeSupportAndSystemConfigurationFull()
1952 …v->MaximumSwathWidthChroma[k] = dml_min(v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.… in dml32_ModeSupportAndSystemConfigurationFull()
3300 dml_min(v->MaxVStartup, v->MaximumVStartup[i][j][k]), in dml32_ModeSupportAndSystemConfigurationFull()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_mode_vba_20.c | 237 mode_lib->vba.FabricAndDRAMBandwidth = dml_min( in dml20_recalculate()
257 dml_min( in adjust_ReturnBW()
280 dml_min( in adjust_ReturnBW()
1037 dml_min( in CalculateVMAndRowBytes()
1042 dml_min( in CalculateVMAndRowBytes()
1061 *dpte_row_height = dml_min(PixelPTEReqWidth, *MacroTileWidth); in CalculateVMAndRowBytes()
1116 mode_lib->vba.PSCL_THROUGHPUT_LUMA[k] = dml_min( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1125 mode_lib->vba.PSCL_THROUGHPUT_LUMA[k] = dml_min( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1134 * dml_min( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1157 dml_min( in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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| H A D | display_mode_vba_20v2.c | 261 mode_lib->vba.FabricAndDRAMBandwidth = dml_min( in dml20v2_recalculate()
281 dml_min( in adjust_ReturnBW()
304 dml_min( in adjust_ReturnBW()
1097 dml_min( in CalculateVMAndRowBytes()
1102 dml_min( in CalculateVMAndRowBytes()
1121 *dpte_row_height = dml_min(PixelPTEReqWidth, *MacroTileWidth); in CalculateVMAndRowBytes()
1176 mode_lib->vba.PSCL_THROUGHPUT_LUMA[k] = dml_min( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1185 mode_lib->vba.PSCL_THROUGHPUT_LUMA[k] = dml_min( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1194 * dml_min( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1217 dml_min( in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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| H A D | display_rq_dlg_calc_20v2.c | 134 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery()
603 log2_dpte_row_height_linear = dml_floor(dml_log2(dml_min(64 * 1024 * pde_buf_entries in get_meta_and_pte_attr()
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| H A D | display_rq_dlg_calc_20.c | 134 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery()
603 log2_dpte_row_height_linear = dml_floor(dml_log2(dml_min(64 * 1024 * pde_buf_entries in get_meta_and_pte_attr()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_mode_vba_314.c | 1076 prefetch_bw_pr = dml_min(1, myPipe->VRatio) * prefetch_bw_pr;
1126 …dst_y_prefetch_equ = dml_min(dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST…
1587 max_vp_horz_width = dml_min((double) MAS_vp_horz_limit, detile_buf_vp_horz_limit);
1588 max_vp_vert_height = dml_min((double) MAS_vp_vert_limit, detile_buf_vp_vert_limit);
1957 …*dpte_row_height = dml_min(128, 1 << (unsigned int) dml_floor(dml_log2(PTEBufferSizeInRequests * *…
1965 *dpte_row_height = dml_min(*PixelPTEReqWidth, *MacroTileWidth);
2021 double IdealFabricAndSDPPortBandwidthPerState = dml_min(
2027 v->ReturnBW = dml_min(
2031 v->ReturnBW = dml_min(
2060 v->PSCL_THROUGHPUT_LUMA[k] = dml_min(
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| H A D | display_rq_dlg_calc_314.c | 147 …* dml_min((double) recout_width, (double) hactive / ((unsigned int) odm_combine * 2)) / pclk_freq_… in get_refcyc_per_delivery()
781 vp_width = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param()
784 vp_height = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_mode_vba_31.c | 1058 prefetch_bw_pr = dml_min(1, myPipe->VRatio) * prefetch_bw_pr;
1108 …dst_y_prefetch_equ = dml_min(dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST…
1570 max_vp_horz_width = dml_min((double) MAS_vp_horz_limit, detile_buf_vp_horz_limit);
1571 max_vp_vert_height = dml_min((double) MAS_vp_vert_limit, detile_buf_vp_vert_limit);
1940 …*dpte_row_height = dml_min(128, 1 << (unsigned int) dml_floor(dml_log2(PTEBufferSizeInRequests * *…
1948 *dpte_row_height = dml_min(*PixelPTEReqWidth, *MacroTileWidth);
2004 double IdealFabricAndSDPPortBandwidthPerState = dml_min(
2009 v->ReturnBW = dml_min(
2013 v->ReturnBW = dml_min(
2042 v->PSCL_THROUGHPUT_LUMA[k] = dml_min(
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| H A D | display_rq_dlg_calc_31.c | 59 …* dml_min((double) recout_width, (double) hactive / ((unsigned int) odm_combine * 2)) / pclk_freq_… in get_refcyc_per_delivery()
693 vp_width = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param()
696 vp_height = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_mode_vba_30.c | 911 …dst_y_prefetch_equ = dml_min(dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 for DST… in CalculatePrefetchSchedule()
1329 max_vp_horz_width = dml_min((double) MAS_vp_horz_limit, detile_buf_vp_horz_limit); in CalculateDCCConfiguration()
1330 max_vp_vert_height = dml_min((double) MAS_vp_vert_limit, detile_buf_vp_vert_limit); in CalculateDCCConfiguration()
1700 …*dpte_row_height = dml_min(128, 1 << (unsigned int) dml_floor(dml_log2(PTEBufferSizeInRequests * *… in CalculateVMAndRowBytes()
1708 *dpte_row_height = dml_min(*PixelPTEReqWidth, *MacroTileWidth); in CalculateVMAndRowBytes()
1797 v->PSCL_THROUGHPUT_LUMA[k] = dml_min(v->MaxDCHUBToPSCLThroughput, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1800 v->PSCL_THROUGHPUT_LUMA[k] = dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1806 * dml_max(v->vtaps[k] / 6.0 * dml_min(1.0, v->HRatio[k]), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1822 v->PSCL_THROUGHPUT_CHROMA[k] = dml_min(v->MaxDCHUBToPSCLThroughput, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1825 v->PSCL_THROUGHPUT_CHROMA[k] = dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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| H A D | display_rq_dlg_calc_30.c | 58 * dml_min((double)recout_width, (double)hactive / ((unsigned int)odm_combine*2)) in get_refcyc_per_delivery()
697 vp_width = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param()
700 vp_height = dml_min(full_src_vp_width, src_hactive_odm); in get_surf_rq_param()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_mode_vba_21.c | 847 *DestinationLinesForPrefetch = dml_min(*DestinationLinesForPrefetch, 63.75); in CalculatePrefetchSchedule()
1415 *dpte_row_height = dml_min(128, in CalculateVMAndRowBytes()
1427 *dpte_row_height = dml_min(*PixelPTEReqWidth, *MacroTileWidth); in CalculateVMAndRowBytes()
1500 locals->PSCL_THROUGHPUT_LUMA[k] = dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1509 locals->PSCL_THROUGHPUT_LUMA[k] = dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1518 * dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1541 dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1551 locals->PSCL_THROUGHPUT_CHROMA[k] = dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1560 * dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1697 locals->SwathWidthY[k] = dml_min( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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| H A D | display_rq_dlg_calc_21.c | 110 * dml_min((double) recout_width, (double) hactive / 2.0) in get_refcyc_per_delivery()
603 dml_min( in get_meta_and_pte_attr()
728 vp_width = dml_min(full_src_vp_width, src_hactive_half); in get_surf_rq_param()
731 vp_height = dml_min(full_src_vp_width, src_hactive_half); in get_surf_rq_param()
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_util.c | 124 dml_float_t dml_min(dml_float_t x, dml_float_t y) in dml_min() function
138 return dml_min(dml_min(x, y), z); in dml_min3()
143 return dml_min(dml_min(dml_min(x, y), z), w); in dml_min4()
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| H A D | display_mode_core.c | 1226 …s->dst_y_prefetch_equ = dml_min(s->dst_y_prefetch_equ, 63.75); // limit to the reg limit of U6.2 f… in CalculatePrefetchSchedule()
2039 …min_row_time = dml_min(dpte_row_height * LineTime / VRatio, dpte_row_height_chroma * LineTime / VR… in CalculateFlipSchedule()
2041 …min_row_time = dml_min(meta_row_height * LineTime / VRatio, meta_row_height_chroma * LineTime / VR… in CalculateFlipSchedule()
2051 min_row_time = dml_min(dpte_row_height * LineTime / VRatio, meta_row_height * LineTime / VRatio); in CalculateFlipSchedule()
2198 …max_vp_horz_width = (dml_uint_t)(dml_min((dml_float_t) MAS_vp_horz_limit, detile_buf_vp_horz_limit… in CalculateDCCConfiguration()
2199 …max_vp_vert_height = (dml_uint_t)(dml_min((dml_float_t) MAS_vp_vert_limit, detile_buf_vp_vert_limi… in CalculateDCCConfiguration()
2618 …*dpte_row_height = (dml_uint_t)(dml_min(128, 1 << (dml_uint_t) dml_floor(dml_log2(PTEBufferSizeInR… in CalculateVMAndRowBytes()
2655 *dpte_row_height = (dml_uint_t)(dml_min(*PixelPTEReqWidth, MacroTileWidth)); in CalculateVMAndRowBytes()
2774 MaxLinkBPP = dml_min(MaxLinkBPP, 16); in TruncToValidBPP()
2776 MaxLinkBPP = dml_min(MaxLinkBPP, 32); in TruncToValidBPP()
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| H A D | display_mode_util.h | 39 __DML_DLL_EXPORT__ dml_float_t dml_min(dml_float_t x, dml_float_t y);
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