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Searched refs:div_int (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/clk/
H A Dclk-versaclock5.c172 u32 div_int; member
440 u32 div_int, div_frc; in vc5_pll_recalc_rate() local
445 div_int = (fb[0] << 4) | (fb[1] >> 4); in vc5_pll_recalc_rate()
449 return (parent_rate * div_int) + ((parent_rate * div_frc) >> 24); in vc5_pll_recalc_rate()
457 u32 div_int; in vc5_pll_determine_rate() local
463 div_int = req->rate / req->best_parent_rate; in vc5_pll_determine_rate()
464 if (div_int > 0xfff) in vc5_pll_determine_rate()
472 hwdata->div_int = div_int; in vc5_pll_determine_rate()
475 req->rate = (req->best_parent_rate * div_int) + ((req->best_parent_rate * div_frc) >> 24); in vc5_pll_determine_rate()
487 fb[0] = hwdata->div_int >> 4; in vc5_pll_set_rate()
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H A Dclk-rp1.c449 u32 *div_int, u32 *div_frac) in get_pll_core_divider() argument
471 *div_int = fbdiv_int; in get_pll_core_divider()
995 int div_int, div_frac; in calc_core_pll_rate() local
1019 div_int = div >> 24; in calc_core_pll_rate()
1021 core_rate = (xosc_rate * ((div_int << 24) + div_frac) + (1 << 23)) >> 24; in calc_core_pll_rate()
H A Dclk-versaclock7.c772 u32 *div_int, u64 *div_frac) in vc7_calc_fod_1st_stage() argument
776 *div_int = (u32)div64_u64_rem(parent_rate, rate, &rem); in vc7_calc_fod_1st_stage()
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_lcn.c1614 u32 div_int, div_frac, fvco3, fpfd, fref3, fcal_div; in wlc_lcnphy_radio_2064_channel_tune_4313() local
1705 div_int = ((fvco3 * (PLL_2064_MHZ >> 4)) / fref3) << 4; in wlc_lcnphy_radio_2064_channel_tune_4313()
1709 div_int++; in wlc_lcnphy_radio_2064_channel_tune_4313()
1715 (u8) (div_int >> 4)); in wlc_lcnphy_radio_2064_channel_tune_4313()
1717 (u8) (div_int << 4)); in wlc_lcnphy_radio_2064_channel_tune_4313()