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Searched refs:div_factor (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/clk/qcom/
H A Dclk-spmi-pmic-div.c39 static inline unsigned int div_factor_to_div(unsigned int div_factor) in div_factor_to_div() argument
41 if (!div_factor) in div_factor_to_div()
42 div_factor = 1; in div_factor_to_div()
44 return 1 << (div_factor - 1); in div_factor_to_div()
63 unsigned int div_factor) in __spmi_pmic_clkdiv_set_enable_state() argument
67 unsigned int div = div_factor_to_div(div_factor); in __spmi_pmic_clkdiv_set_enable_state()
84 unsigned int div_factor; in spmi_pmic_clkdiv_set_enable_state() local
86 regmap_read(clkdiv->regmap, clkdiv->base + REG_DIV_CTL1, &div_factor); in spmi_pmic_clkdiv_set_enable_state()
87 div_factor &= DIV_CTL1_DIV_FACTOR_MASK; in spmi_pmic_clkdiv_set_enable_state()
89 return __spmi_pmic_clkdiv_set_enable_state(clkdiv, enable, div_factor); in spmi_pmic_clkdiv_set_enable_state()
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/linux/lib/tests/
H A Dtest_fprobe.c11 #define div_factor 3 macro
27 return (value / div_factor); in fprobe_selftest_target()
32 return (value / div_factor) + 1; in fprobe_selftest_target2()
43 entry_val = (rand1 / div_factor); in fp_entry_handler()
63 KUNIT_EXPECT_EQ(current_test, ret, (rand1 / div_factor) + 1); in fp_exit_handler()
65 KUNIT_EXPECT_EQ(current_test, ret, (rand1 / div_factor)); in fp_exit_handler()
66 KUNIT_EXPECT_EQ(current_test, entry_val, (rand1 / div_factor)); in fp_exit_handler()
67 exit_val = entry_val + div_factor; in fp_exit_handler()
118 KUNIT_EXPECT_EQ(test, entry_val + div_factor, exit_val); in test_fprobe()
124 KUNIT_EXPECT_EQ(test, entry_val + div_factor, exit_val); in test_fprobe()
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H A Dtest_kprobes.c13 #define div_factor 3 macro
28 return (value / div_factor); in kprobe_target()
33 return (value / div_factor); in kprobe_recursed_target()
52 posth_val = preh_val + div_factor; in kp_post_handler()
73 return (value / div_factor) + 1; in kprobe_target2()
105 preh_val = (rand1 / div_factor) + 1; in kp_pre_handler2()
112 KUNIT_EXPECT_EQ(current_test, preh_val, (rand1 / div_factor) + 1); in kp_post_handler2()
113 posth_val = preh_val + div_factor; in kp_post_handler2()
178 krph_val = (rand1 / div_factor); in entry_handler()
187 KUNIT_EXPECT_EQ(current_test, ret, rand1 / div_factor); in return_handler()
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/linux/drivers/gpu/drm/bridge/
H A Dssd2825.c417 u32 div_factor = 1, mul_factor, fr = 0; in construct_pll_config() local
419 while (reference_freq_khz / (div_factor + 1) >= SSD2825_REF_MIN_CLK) in construct_pll_config()
420 div_factor++; in construct_pll_config()
421 if (div_factor > 31) in construct_pll_config()
422 div_factor = 31; in construct_pll_config()
424 mul_factor = DIV_ROUND_UP(desired_pll_freq_kbps * div_factor, in construct_pll_config()
427 priv->pll_freq_kbps = reference_freq_khz * mul_factor / div_factor; in construct_pll_config()
437 return (fr << 14) | (div_factor << 8) | mul_factor; in construct_pll_config()
/linux/drivers/media/dvb-frontends/
H A Dix2505v.c124 u32 div_factor, N , A, x; in ix2505v_set_params() local
147 div_factor = (frequency * ref) / 40; /* local osc = 4Mhz */ in ix2505v_set_params()
148 x = div_factor / psc; in ix2505v_set_params()
/linux/drivers/media/platform/qcom/iris/
H A Diris_buffer.c212 u32 div_factor = 2; in iris_dec_bitstream_buffer_size() local
216 div_factor = 4; in iris_dec_bitstream_buffer_size()
220 div_factor = 1; in iris_dec_bitstream_buffer_size()
227 frame_size = base_res_mbs * (16 * 16) * 3 / 2 / div_factor; in iris_dec_bitstream_buffer_size()
/linux/drivers/media/platform/qcom/venus/
H A Dhfi_plat_bufs_v6.c1122 u32 div_factor = 1; in calculate_dec_input_frame_size() local
1134 div_factor = 4; in calculate_dec_input_frame_size()
1139 div_factor = 1; in calculate_dec_input_frame_size()
1141 div_factor = 2; in calculate_dec_input_frame_size()
1144 frame_size = base_res_mbs * MB_SIZE_IN_PIXEL * 3 / 2 / div_factor; in calculate_dec_input_frame_size()
/linux/drivers/platform/x86/intel/speed_select_if/
H A Disst_tpmi_core.c580 #define _write_cp_info(name_str, name, offset, start, width, div_factor)\ argument
588 val |= (name / div_factor) << start;\
799 #define _write_pp_info(name_str, name, offset, start, width, div_factor)\ argument
807 val |= (name / div_factor) << start;\
/linux/sound/soc/codecs/
H A Dlpass-va-macro.c1428 u32 div_factor; in va_macro_validate_dmic_sample_rate() local
1434 div_factor = mclk_rate / dmic_sample_rate; in va_macro_validate_dmic_sample_rate()
1436 switch (div_factor) { in va_macro_validate_dmic_sample_rate()
H A Dwcd934x.c4709 u32 div_factor; in wcd934x_get_dmic_clk_val() local
4725 div_factor = mclk_rate / dmic_clk_rate; in wcd934x_get_dmic_clk_val()
4726 switch (div_factor) { in wcd934x_get_dmic_clk_val()
4748 __func__, div_factor, mclk_rate, dmic_clk_rate); in wcd934x_get_dmic_clk_val()
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clock_source.c990 REG_WRITE(MODULO[inst], dp_dto_ref_khz * e->div_factor); in dcn31_program_pix_clk()
1095 dto_params.refclk_hz *= e->div_factor; in dcn401_program_pix_clk()
1344 REG_WRITE(MODULO[inst], dp_dto_ref_khz * e->div_factor); in dcn3_program_pix_clk()
H A Ddce_clock_source.h324 unsigned short div_factor; member
/linux/drivers/dpll/zl3073x/
H A Ddpll.c446 s64 conn_period, div_factor; in zl3073x_dpll_input_pin_phase_offset_get() local
449 div_factor = div64_s64(ref_phase, conn_period); in zl3073x_dpll_input_pin_phase_offset_get()
450 ref_phase -= conn_period * div_factor; in zl3073x_dpll_input_pin_phase_offset_get()