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Searched refs:div_clk_id (Results 1 – 4 of 4) sorted by relevance

/linux/sound/soc/mediatek/mt8189/
H A Dmt8189-afe-clk.c19 int div_clk_id; member
25 .div_clk_id = MT8189_CLK_TOP_APLL12_DIV_I2SIN0,
29 .div_clk_id = MT8189_CLK_TOP_APLL12_DIV_I2SIN1,
33 .div_clk_id = MT8189_CLK_TOP_APLL12_DIV_I2SOUT0,
37 .div_clk_id = MT8189_CLK_TOP_APLL12_DIV_I2SOUT1,
41 .div_clk_id = MT8189_CLK_TOP_APLL12_DIV_FMI2S,
45 .div_clk_id = MT8189_CLK_TOP_APLL12_DIV_TDMOUT_M,
49 .div_clk_id = MT8189_CLK_TOP_APLL12_DIV_TDMOUT_B,
588 int div_clk_id; in mt8189_mck_enable() local
597 div_clk_id = mck_div[mck_id].div_clk_id; in mt8189_mck_enable()
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/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-afe-clk.c406 int div_clk_id; member
422 .div_clk_id = CLK_TOP_APLL12_DIV0,
435 .div_clk_id = CLK_TOP_APLL12_DIV1,
448 .div_clk_id = CLK_TOP_APLL12_DIV2,
461 .div_clk_id = CLK_TOP_APLL12_DIV3,
474 .div_clk_id = CLK_TOP_APLL12_DIV4,
487 .div_clk_id = CLK_TOP_APLL12_DIVB,
497 .div_clk_id = CLK_TOP_APLL12_DIV5,
510 .div_clk_id = CLK_TOP_APLL12_DIV6,
523 .div_clk_id = CLK_TOP_APLL12_DIV7,
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/linux/sound/soc/mediatek/mt8183/
H A Dmt8183-afe-clk.c508 int div_clk_id; member
514 .div_clk_id = CLK_TOP_APLL12_DIV0,
518 .div_clk_id = CLK_TOP_APLL12_DIV1,
522 .div_clk_id = CLK_TOP_APLL12_DIV2,
526 .div_clk_id = CLK_TOP_APLL12_DIV3,
530 .div_clk_id = CLK_TOP_APLL12_DIV4,
534 .div_clk_id = CLK_TOP_APLL12_DIVB,
538 .div_clk_id = -1,
549 int div_clk_id = mck_div[mck_id].div_clk_id; in mt8183_mck_enable() local
575 ret = clk_prepare_enable(afe_priv->clk[div_clk_id]); in mt8183_mck_enable()
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/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-afe-clk.c459 u32 div_clk_id; member
465 .div_clk_id = CLK_TOP_APLL12_DIV0,
469 .div_clk_id = CLK_TOP_APLL12_DIV1,
473 .div_clk_id = CLK_TOP_APLL12_DIV2,
477 .div_clk_id = CLK_TOP_APLL12_DIV4,
481 .div_clk_id = CLK_TOP_APLL12_DIV_TDM,
492 int div_clk_id = mck_div[mck_id].div_clk_id; in mt8186_mck_enable() local
514 ret = clk_prepare_enable(afe_priv->clk[div_clk_id]); in mt8186_mck_enable()
517 __func__, aud_clks[div_clk_id], ret); in mt8186_mck_enable()
520 ret = clk_set_rate(afe_priv->clk[div_clk_id], rate); in mt8186_mck_enable()
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