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Searched refs:dev_specs (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/net/ethernet/hisilicon/hibmcge/
H A Dhbg_txrx.h13 return (dir == HBG_DIR_TX) ? priv->dev_specs.max_frame_len : in hbg_spec_max_frame_len()
14 priv->dev_specs.rx_buf_size; in hbg_spec_max_frame_len()
20 return (dir == HBG_DIR_TX) ? priv->dev_specs.tx_fifo_num : in hbg_get_spec_fifo_max_num()
21 priv->dev_specs.rx_fifo_num; in hbg_get_spec_fifo_max_num()
H A Dhbg_main.c338 struct hbg_dev_specs *dev_specs = &priv->dev_specs; in hbg_mac_filter_init() local
342 tmp_table = devm_kcalloc(&priv->pdev->dev, dev_specs->uc_mac_num, in hbg_mac_filter_init()
348 filter->table_max_len = dev_specs->uc_mac_num; in hbg_mac_filter_init()
458 netdev->max_mtu = priv->dev_specs.max_mtu; in hbg_probe()
459 netdev->min_mtu = priv->dev_specs.min_mtu; in hbg_probe()
464 hbg_net_set_mac_address(priv->netdev, &priv->dev_specs.mac_addr); in hbg_probe()
H A Dhbg_hw.c64 struct hbg_dev_specs *specs = &priv->dev_specs; in hbg_hw_dev_specs_init()
187 frame_len = mtu + VLAN_HLEN * priv->dev_specs.vlan_layers + in hbg_hw_set_mtu()
353 ctrl |= FIELD_PREP(HBG_REG_RX_CTRL_PORT_NUM, priv->dev_specs.mac_id); in hbg_hw_init_rx_ctrl()
370 HBG_REG_RX_BUF_SIZE_M, priv->dev_specs.rx_buf_size); in hbg_hw_init_rx_control()
H A Dhbg_mdio.c106 u32 freq = priv->dev_specs.mdio_frequency; in hbg_mdio_init_hw()
274 mac->phy_addr = priv->dev_specs.phy_addr; in hbg_mdio_init()
H A Dhbg_txrx.c380 priv->dev_specs.max_frame_len)) { in hbg_rx_pkt_check()
386 priv->dev_specs.mac_id || in hbg_rx_pkt_check()
433 u32 max_count = priv->dev_specs.rx_fifo_num; in hbg_rx_fill_buffers()
H A Dhbg_common.h277 struct hbg_dev_specs dev_specs; member
/linux/drivers/net/ethernet/hisilicon/hns3/
H A Dhns3_debugfs.c731 struct hnae3_dev_specs *dev_specs = &ae_dev->dev_specs; in hns3_dbg_dev_specs() local
736 seq_printf(s, "MAC entry num: %u\n", dev_specs->mac_entry_num); in hns3_dbg_dev_specs()
737 seq_printf(s, "MNG entry num: %u\n", dev_specs->mng_entry_num); in hns3_dbg_dev_specs()
739 dev_specs->max_non_tso_bd_num); in hns3_dbg_dev_specs()
740 seq_printf(s, "RSS ind tbl size: %u\n", dev_specs->rss_ind_tbl_size); in hns3_dbg_dev_specs()
741 seq_printf(s, "RSS key size: %u\n", dev_specs->rss_key_size); in hns3_dbg_dev_specs()
750 seq_printf(s, "MAX INT QL: %u\n", dev_specs->int_ql_max); in hns3_dbg_dev_specs()
751 seq_printf(s, "MAX INT GL: %u\n", dev_specs->max_int_gl); in hns3_dbg_dev_specs()
752 seq_printf(s, "MAX TM RATE: %u\n", dev_specs->max_tm_rate); in hns3_dbg_dev_specs()
753 seq_printf(s, "MAX QSET number: %u\n", dev_specs->max_qset_num); in hns3_dbg_dev_specs()
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H A Dhns3_ethtool.c937 return ae_dev->dev_specs.rss_ind_tbl_size; in hns3_get_rss_indir_size()
1400 if (cmd->rx_coalesce_usecs > ae_dev->dev_specs.max_int_gl) { in hns3_check_gl_coalesce_para()
1403 ae_dev->dev_specs.max_int_gl); in hns3_check_gl_coalesce_para()
1407 if (cmd->tx_coalesce_usecs > ae_dev->dev_specs.max_int_gl) { in hns3_check_gl_coalesce_para()
1410 ae_dev->dev_specs.max_int_gl); in hns3_check_gl_coalesce_para()
1472 !ae_dev->dev_specs.int_ql_max) { in hns3_check_ql_coalesce_param()
1477 if (cmd->tx_max_coalesced_frames > ae_dev->dev_specs.int_ql_max || in hns3_check_ql_coalesce_param()
1478 cmd->rx_max_coalesced_frames > ae_dev->dev_specs.int_ql_max) { in hns3_check_ql_coalesce_param()
1481 ae_dev->dev_specs.int_ql_max); in hns3_check_ql_coalesce_param()
H A Dhnae3.h437 struct hnae3_dev_specs dev_specs; member
H A Dhns3_enet.c575 if (ae_dev->dev_specs.int_ql_max) { in hns3_vector_coalesce_init()
578 tx_coal->int_ql_max = ae_dev->dev_specs.int_ql_max; in hns3_vector_coalesce_init()
579 rx_coal->int_ql_max = ae_dev->dev_specs.int_ql_max; in hns3_vector_coalesce_init()
4813 if (ae_dev->dev_specs.int_ql_max) { in hns3_nic_init_coal_cfg()
5383 priv->max_non_tso_bd_num = ae_dev->dev_specs.max_non_tso_bd_num; in hns3_client_init()
5466 netdev->max_mtu = HNS3_MAX_MTU(ae_dev->dev_specs.max_frm_size); in hns3_client_init()
/linux/drivers/net/ethernet/hisilicon/hns3/hns3vf/
H A Dhclgevf_main.c580 hdev->ae_dev->dev_specs.rss_ind_tbl_size); in hclgevf_get_rss()
600 for (i = 0; i < hdev->ae_dev->dev_specs.rss_ind_tbl_size; i++) in hclgevf_set_rss()
2732 ae_dev->dev_specs.max_non_tso_bd_num = in hclgevf_set_default_dev_specs()
2734 ae_dev->dev_specs.rss_ind_tbl_size = HCLGEVF_RSS_IND_TBL_SIZE; in hclgevf_set_default_dev_specs()
2735 ae_dev->dev_specs.rss_key_size = HCLGE_COMM_RSS_KEY_SIZE; in hclgevf_set_default_dev_specs()
2736 ae_dev->dev_specs.max_int_gl = HCLGEVF_DEF_MAX_INT_GL; in hclgevf_set_default_dev_specs()
2737 ae_dev->dev_specs.max_frm_size = HCLGEVF_MAC_MAX_FRAME; in hclgevf_set_default_dev_specs()
2750 ae_dev->dev_specs.max_non_tso_bd_num = req0->max_non_tso_bd_num; in hclgevf_parse_dev_specs()
2751 ae_dev->dev_specs.rss_ind_tbl_size = in hclgevf_parse_dev_specs()
2753 ae_dev->dev_specs.int_ql_max = le16_to_cpu(req0->int_ql_max); in hclgevf_parse_dev_specs()
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/linux/drivers/net/ethernet/hisilicon/hns3/hns3_common/
H A Dhclge_comm_rss.c38 u16 rss_ind_tbl_size = ae_dev->dev_specs.rss_ind_tbl_size; in hclge_comm_rss_init_cfg()
223 for (i = 0; i < ae_dev->dev_specs.rss_ind_tbl_size; i++) in hclge_comm_rss_indir_init_cfg()
288 rss_cfg_tbl_num = ae_dev->dev_specs.rss_ind_tbl_size / in hclge_comm_set_rss_indir_table()
/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_main.c480 u32 reg_num = hdev->ae_dev->dev_specs.mac_stats_num; in hclge_mac_update_stats_complete()
560 if (hdev->ae_dev->dev_specs.mac_stats_num) in hclge_mac_update_stats()
574 if (strs[i].stats_num <= hdev->ae_dev->dev_specs.mac_stats_num) in hclge_comm_get_count()
588 if (strs[i].stats_num > hdev->ae_dev->dev_specs.mac_stats_num) in hclge_comm_get_stats()
608 if (strs[i].stats_num > hdev->ae_dev->dev_specs.mac_stats_num) in hclge_comm_get_strings()
690 if (hdev->ae_dev->dev_specs.hilink_version != in hclge_get_sset_count()
1368 ae_dev->dev_specs.max_non_tso_bd_num = HCLGE_MAX_NON_TSO_BD_NUM; in hclge_set_default_dev_specs()
1369 ae_dev->dev_specs.rss_ind_tbl_size = HCLGE_RSS_IND_TBL_SIZE; in hclge_set_default_dev_specs()
1370 ae_dev->dev_specs.rss_key_size = HCLGE_COMM_RSS_KEY_SIZE; in hclge_set_default_dev_specs()
1371 ae_dev->dev_specs.max_tm_rate = HCLGE_ETHER_MAX_RATE; in hclge_set_default_dev_specs()
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H A Dhclge_tm.c474 hdev->ae_dev->dev_specs.max_tm_rate); in hclge_tm_port_shaper_cfg()
598 max_tx_rate = hdev->ae_dev->dev_specs.max_tm_rate; in hclge_tm_qs_shaper_cfg()
602 hdev->ae_dev->dev_specs.max_tm_rate); in hclge_tm_qs_shaper_cfg()
801 hdev->ae_dev->dev_specs.max_tm_rate; in hclge_tm_pg_info_init()
885 u32 max_tm_rate = hdev->ae_dev->dev_specs.max_tm_rate; in hclge_tm_pg_shaper_cfg()
1047 u32 max_tm_rate = hdev->ae_dev->dev_specs.max_tm_rate; in hclge_tm_pri_tc_base_shaper_cfg()
1098 hdev->ae_dev->dev_specs.max_tm_rate); in hclge_tm_pri_vnet_base_shaper_pri_cfg()
1128 u32 max_tm_rate = hdev->ae_dev->dev_specs.max_tm_rate; in hclge_tm_pri_vnet_base_shaper_qs_cfg()
H A Dhclge_regs.c419 HCLGE_REG_TLV_SIZE) * ae_dev->dev_specs.tnl_num; in hclge_get_dfx_reg_len()
434 for (i = HCLGE_REG_RPU_TNL_ID_0; i <= ae_dev->dev_specs.tnl_num; i++) { in hclge_get_dfx_rpu_tnl_reg()
H A Dhclge_err.c1611 loop_time = min(hdev->ae_dev->dev_specs.tnl_num, in hclge_query_reg_info_of_ssu()