Searched refs:clock_req (Results 1 – 5 of 5) sorted by relevance
604 struct pp_display_clock_request clock_req; in pp_nv_set_hard_min_dcefclk_by_freq() local607 clock_req.clock_type = amd_pp_dcef_clock; in pp_nv_set_hard_min_dcefclk_by_freq()608 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_dcefclk_by_freq()613 ret = amdgpu_dpm_display_clock_voltage_request(adev, &clock_req); in pp_nv_set_hard_min_dcefclk_by_freq()627 struct pp_display_clock_request clock_req; in pp_nv_set_hard_min_uclk_by_freq() local630 clock_req.clock_type = amd_pp_mem_clock; in pp_nv_set_hard_min_uclk_by_freq()631 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_uclk_by_freq()636 ret = amdgpu_dpm_display_clock_voltage_request(adev, &clock_req); in pp_nv_set_hard_min_uclk_by_freq()663 struct pp_display_clock_request clock_req; in pp_nv_set_voltage_by_freq() local668 clock_req.clock_type = amd_pp_disp_clock; in pp_nv_set_voltage_by_freq()[all …]
52 struct pp_display_clock_request *clock_req) in smu10_display_clock_voltage_request() argument55 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu10_display_clock_voltage_request()56 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in smu10_display_clock_voltage_request()191 struct pp_display_clock_request clock_req; in smu10_set_clock_limit() local194 clock_req.clock_type = amd_pp_dcf_clock; in smu10_set_clock_limit()195 clock_req.clock_freq_in_khz = clocks.dcefClock * 10; in smu10_set_clock_limit()197 PP_ASSERT_WITH_CODE(!smu10_display_clock_voltage_request(hwmgr, &clock_req), in smu10_set_clock_limit()
1574 struct pp_display_clock_request *clock_req) in vega12_display_clock_voltage_request() argument1578 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega12_display_clock_voltage_request()1579 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega12_display_clock_voltage_request()1621 struct pp_display_clock_request clock_req; in vega12_notify_smc_display_config_after_ps_adjustment() local1635 clock_req.clock_type = amd_pp_dcef_clock; in vega12_notify_smc_display_config_after_ps_adjustment()1636 clock_req.clock_freq_in_khz = min_clocks.dcefClock / 10; in vega12_notify_smc_display_config_after_ps_adjustment()1637 if (!vega12_display_clock_voltage_request(hwmgr, &clock_req)) { in vega12_notify_smc_display_config_after_ps_adjustment()
2299 struct pp_display_clock_request *clock_req) in vega20_display_clock_voltage_request() argument2303 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega20_display_clock_voltage_request()2304 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega20_display_clock_voltage_request()2355 struct pp_display_clock_request clock_req; in vega20_notify_smc_display_config_after_ps_adjustment() local2363 clock_req.clock_type = amd_pp_dcef_clock; in vega20_notify_smc_display_config_after_ps_adjustment()2364 clock_req.clock_freq_in_khz = min_clocks.dcefClock * 10; in vega20_notify_smc_display_config_after_ps_adjustment()2365 if (!vega20_display_clock_voltage_request(hwmgr, &clock_req)) { in vega20_notify_smc_display_config_after_ps_adjustment()
4037 struct pp_display_clock_request *clock_req) in vega10_display_clock_voltage_request() argument4040 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega10_display_clock_voltage_request()4041 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega10_display_clock_voltage_request()4107 struct pp_display_clock_request clock_req; in vega10_notify_smc_display_config_after_ps_adjustment() local4126 clock_req.clock_type = amd_pp_dcef_clock; in vega10_notify_smc_display_config_after_ps_adjustment()4127 clock_req.clock_freq_in_khz = dpm_table->dpm_levels[i].value * 10; in vega10_notify_smc_display_config_after_ps_adjustment()4128 if (!vega10_display_clock_voltage_request(hwmgr, &clock_req)) { in vega10_notify_smc_display_config_after_ps_adjustment()