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Searched refs:cfg_off (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/pmdomain/imx/
H A Dimx93-blk-ctrl.c65 u32 cfg_off; member
113 mask = PRIO_MASK << qos->cfg_off; in imx93_blk_ctrl_set_qos()
114 mask |= PRIO_MASK << (qos->cfg_off + 4); in imx93_blk_ctrl_set_qos()
115 val = qos->cfg_prio << qos->cfg_off; in imx93_blk_ctrl_set_qos()
116 val |= qos->default_prio << (qos->cfg_off + 4); in imx93_blk_ctrl_set_qos()
353 .cfg_off = PXP_R_CFG_QOS_OFF,
358 .cfg_off = PXP_W_CFG_QOS_OFF,
374 .cfg_off = LCDIF_CFG_QOS_OFF,
390 .cfg_off = ISI_Y_W_CFG_QOS_OFF,
395 .cfg_off = ISI_Y_R_CFG_QOS_OFF,
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/linux/drivers/clk/qcom/
H A Dclk-rcg.h175 u8 cfg_off; member
H A Dclk-rcg2.c49 #define RCG_CFG_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + CFG_REG)
50 #define RCG_M_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + M_REG)
51 #define RCG_N_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + N_REG)
52 #define RCG_D_OFFSET(rcg) ((rcg)->cmd_rcgr + (rcg)->cfg_off + D_REG)
H A Dgcc-qcs404.c657 .cfg_off = 0x20,
/linux/drivers/accel/habanalabs/goya/
H A Dgoya.c2021 u32 cfg_off = mmTPC1_CFG_SM_BASE_ADDRESS_LOW - in goya_init_tpc_qmans() local
2032 WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_LOW + i * cfg_off, in goya_init_tpc_qmans()
2034 WREG32(mmTPC0_CFG_SM_BASE_ADDRESS_HIGH + i * cfg_off, in goya_init_tpc_qmans()