| /linux/drivers/memory/ |
| H A D | stm32-fmc2-ebi.c | 202 u32 bcr[FMC2_MAX_EBI_CE]; member
245 u32 bcr; in stm32_fmc2_ebi_check_mux() local
248 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_mux()
252 if (bcr & FMC2_BCR_MTYP) in stm32_fmc2_ebi_check_mux()
262 u32 bcr, val = FIELD_PREP(FMC2_BCR_MTYP, FMC2_BCR_MTYP_NOR); in stm32_fmc2_ebi_check_waitcfg() local
265 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_waitcfg()
269 if ((bcr & FMC2_BCR_MTYP) == val && bcr & FMC2_BCR_BURSTEN) in stm32_fmc2_ebi_check_waitcfg()
279 u32 bcr; in stm32_fmc2_ebi_check_sync_trans() local
282 ret = regmap_read(ebi->regmap, FMC2_BCR(cs), &bcr); in stm32_fmc2_ebi_check_sync_trans()
286 if (bcr & FMC2_BCR_BURSTEN) in stm32_fmc2_ebi_check_sync_trans()
[all …]
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| /linux/drivers/spi/ |
| H A D | spi-intel-pci.c | 20 u32 bcr; in intel_spi_pci_set_writeable() local
23 pci_read_config_dword(pdev, BCR, &bcr); in intel_spi_pci_set_writeable()
24 if (!(bcr & BCR_WPD)) { in intel_spi_pci_set_writeable()
25 bcr |= BCR_WPD; in intel_spi_pci_set_writeable()
26 pci_write_config_dword(pdev, BCR, bcr); in intel_spi_pci_set_writeable()
27 pci_read_config_dword(pdev, BCR, &bcr); in intel_spi_pci_set_writeable()
30 return bcr & BCR_WPD; in intel_spi_pci_set_writeable()
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| /linux/arch/arc/include/asm/ |
| H A D | dsp-impl.h | 131 struct bcr_generic bcr; in dsp_exist() local
133 READ_BCR(ARC_AUX_DSP_BUILD, bcr); in dsp_exist()
134 return !!bcr.ver; in dsp_exist()
139 struct bcr_generic bcr; in agu_exist() local
141 READ_BCR(ARC_AUX_AGU_BUILD, bcr); in agu_exist()
142 return !!bcr.ver; in agu_exist()
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| /linux/drivers/i2c/busses/ |
| H A D | i2c-synquacer.c | 261 unsigned char bsr, bcr; in synquacer_i2c_master_start()
269 bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_master_start()
270 dev_dbg(i2c->dev, "bsr:0x%02x, bcr:0x%02x\n", bsr, bcr); in synquacer_i2c_master_start()
273 !(bcr & SYNQUACER_I2C_BCR_MSS)) { in synquacer_i2c_master_start()
280 writeb(bcr | SYNQUACER_I2C_BCR_SCC, in synquacer_i2c_master_start()
283 if (bcr & SYNQUACER_I2C_BCR_MSS) { in synquacer_i2c_master_start()
289 writeb(bcr | SYNQUACER_I2C_BCR_MSS | in synquacer_i2c_master_start()
298 bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_master_start()
299 dev_dbg(i2c->dev, "bsr:0x%02x, bcr in synquacer_i2c_master_start()
260 unsigned char bsr, bcr; synquacer_i2c_master_start() local
361 unsigned char bsr, bcr; synquacer_i2c_isr() local
[all...] |
| /linux/drivers/net/can/cc770/ |
| H A D | cc770_isa.c | 74 static u8 bcr[MAXDEV] = {[0 ... (MAXDEV - 1)] = 0xff}; variable
99 module_param_array(bcr, byte, NULL, 0444);
100 MODULE_PARM_DESC(bcr, "Bus configuration register (default=0x40 [CBY])");
246 if (bcr[idx] != 0xff) in cc770_isa_probe()
247 priv->bus_config = bcr[idx]; in cc770_isa_probe()
248 else if (bcr[0] != 0xff) in cc770_isa_probe()
249 priv->bus_config = bcr[0]; in cc770_isa_probe()
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| /linux/drivers/i3c/master/mipi-i3c-hci/ |
| H A D | dct_v1.c | 21 u64 *pid, unsigned int *dcr, unsigned int *bcr) in i3c_hci_dct_get_val() argument
35 *bcr = FIELD_GET(W2_MASK(79, 72), dct_entry_data[2]); in i3c_hci_dct_get_val()
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| H A D | cmd_v2.c | 244 unsigned int dcr, bcr; in hci_cmd_v2_daa() local
290 bcr = FIELD_GET(W1_MASK(55, 48), device_id[1]); in hci_cmd_v2_daa()
294 next_addr, pid, dcr, bcr); in hci_cmd_v2_daa()
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| H A D | cmd_v1.c | 294 unsigned int dcr, bcr; in hci_cmd_v1_daa() local
349 i3c_hci_dct_get_val(hci, 0, &pid, &dcr, &bcr); in hci_cmd_v1_daa()
352 next_addr, pid, dcr, bcr); in hci_cmd_v1_daa()
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| H A D | dct.h | 14 u64 *pid, unsigned int *dcr, unsigned int *bcr);
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| /linux/include/linux/i3c/ |
| H A D | device.h | 97 #define I3C_BCR_DEVICE_ROLE(bcr) ((bcr) & GENMASK(7, 6)) argument
131 u8 bcr; member
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| H A D | ccc.h | 116 u8 bcr; member
188 u8 bcr; member
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| /linux/include/soc/arc/ |
| H A D | mcip.h | 91 #define mcip_idu_bcr_to_nr_irqs(bcr) (4 * (1 << (bcr).cirqnum)) argument
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| /linux/arch/arc/mm/ |
| H A D | tlb.c | 566 unsigned int bcr, u_dtlb, u_itlb, sasid; in arc_mmu_mumbojumbo() local
572 bcr = read_aux_reg(ARC_REG_MMU_BCR); in arc_mmu_mumbojumbo()
573 mmu->ver = (bcr >> 24); in arc_mmu_mumbojumbo()
576 mmu3 = (struct bcr_mmu_3 *)&bcr; in arc_mmu_mumbojumbo()
584 mmu4 = (struct bcr_mmu_4 *)&bcr; in arc_mmu_mumbojumbo()
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| /linux/arch/arc/kernel/ |
| H A D | setup.c | 293 struct bcr_generic bcr; in arc_cpu_mumbojumbo() local
338 READ_BCR(ARC_REG_SMART_BCR, bcr); in arc_cpu_mumbojumbo()
339 smart = bcr.ver ? 1 : 0; in arc_cpu_mumbojumbo()
341 READ_BCR(ARC_REG_RTT_BCR, bcr); in arc_cpu_mumbojumbo()
342 rtt = bcr.ver ? 1 : 0; in arc_cpu_mumbojumbo()
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| /linux/include/linux/can/platform/ |
| H A D | cc770.h | 31 u8 bcr; /* Bus Configuration Register */ member
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| /linux/drivers/mfd/ |
| H A D | lpc_ich.c | 1282 u32 bcr; in lpc_ich_set_writeable() local
1284 pci_bus_read_config_dword(bus, devfn, BCR, &bcr); in lpc_ich_set_writeable()
1285 if (!(bcr & BCR_WPD)) { in lpc_ich_set_writeable()
1286 bcr |= BCR_WPD; in lpc_ich_set_writeable()
1287 pci_bus_write_config_dword(bus, devfn, BCR, bcr); in lpc_ich_set_writeable()
1288 pci_bus_read_config_dword(bus, devfn, BCR, &bcr); in lpc_ich_set_writeable()
1291 return bcr & BCR_WPD; in lpc_ich_set_writeable()
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| /linux/drivers/i3c/ |
| H A D | master.c | 177 ret = sprintf(buf, "0x%02x\n", desc->info.bcr); in bcr_show()
182 static DEVICE_ATTR_RO(bcr);
1160 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == in i3c_master_defslvs_locked()
1179 defslvs->master.bcr = master->this->info.bcr; in i3c_master_defslvs_locked()
1196 desc->bcr = i3cdev->info.bcr; in i3c_master_defslvs_locked()
1264 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) in i3c_master_getmrl_locked()
1442 info->bcr = getbcr->bcr; in i3c_master_getbcr_locked()
1502 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { in i3c_master_retrieve_dev_info()
1508 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) in i3c_master_retrieve_dev_info()
1514 if (dev->info.bcr & I3C_BCR_HDR_CAP) { in i3c_master_retrieve_dev_info()
[all …]
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| /linux/tools/testing/selftests/kvm/arm64/ |
| H A D | debug-exceptions.c | 167 uint32_t bcr; in install_hw_bp() local
169 bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E; in install_hw_bp()
170 write_dbgbcr(bpn, bcr); in install_hw_bp()
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| /linux/drivers/net/can/rcar/ |
| H A D | rcar_can.c | 68 u8 bcr[3]; /* Bit Configuration Register */ member
430 u32 bcr; in rcar_can_set_bittiming() local
432 bcr = FIELD_PREP(RCAR_CAN_BCR_TSEG1, bt->phase_seg1 + bt->prop_seg - 1) | in rcar_can_set_bittiming()
440 writel((bcr << 8) | priv->clock_select, &priv->regs->bcr); in rcar_can_set_bittiming()
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| /linux/sound/soc/fsl/ |
| H A D | fsl_dma.h | 20 __be32 bcr; /* Byte count register */ member
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| H A D | fsl_dma.c | 447 out_be32(&dma_channel->bcr, 0); in fsl_dma_open()
759 out_be32(&dma_channel->bcr, 0); in fsl_dma_hw_free()
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| /linux/arch/powerpc/include/asm/ |
| H A D | mpc5121.h | 32 u32 bcr; /* Bread Crumb Register */ member
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| /linux/arch/arm64/include/asm/ |
| H A D | hw_breakpoint.h | 93 #define AARCH64_DBG_REG_NAME_BCR bcr
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| /linux/drivers/i3c/master/ |
| H A D | i3c-master-cdns.c | 302 #define DEV_ID_RR2_BCR(bcr) ((bcr) << 8) argument
1045 info->bcr = rr >> 8; in cdns_i3c_master_dev_rr_to_info()
1263 if (info.bcr & I3C_BCR_HDR_CAP) in cdns_i3c_master_bus_init()
1429 sircfg = SIR_MAP_DEV_ROLE(dev->info.bcr >> 6) | in cdns_i3c_master_enable_ibi()
1434 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) in cdns_i3c_master_enable_ibi()
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| H A D | ast2600-i3c-master.c | 113 if (enable && dev->info.bcr & I3C_BCR_IBI_PAYLOAD) { in ast2600_i3c_set_dat_ibi()
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