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Searched refs:amdgpu_ras_get_context (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/ !
H A Damdgpu_ras.c164 if (adev && amdgpu_ras_get_context(adev)) in amdgpu_ras_set_error_query_ready()
165 amdgpu_ras_get_context(adev)->error_query_ready = ready; in amdgpu_ras_set_error_query_ready()
170 if (adev && amdgpu_ras_get_context(adev)) in amdgpu_ras_get_error_query_ready()
171 return amdgpu_ras_get_context(adev)->error_query_ready; in amdgpu_ras_get_error_query_ready()
221 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_check_address_validity()
654 &(amdgpu_ras_get_context(adev)->eeprom_control)); in amdgpu_ras_debugfs_eeprom_write()
659 amdgpu_ras_get_context(adev)->flags = RAS_DEFAULT_FLAGS; in amdgpu_ras_debugfs_eeprom_write()
749 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_create_obj()
785 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_find_obj()
828 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_is_feature_enabled()
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H A Damdgpu_ras_eeprom.c448 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_reset_table()
577 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_check_err_threshold()
658 struct amdgpu_ras *con = amdgpu_ras_get_context(to_amdgpu_device(control)); in amdgpu_ras_eeprom_append_table()
779 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_update_header()
917 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_smu_eeprom_append()
1103 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_read()
1207 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_eeprom_size_read()
1276 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_table_read()
1395 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_eeprom_table_read()
1520 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_smu_eeprom_init()
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H A Dgfx_v11_0_3.c88 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in gfx_v11_0_3_poison_consumption_handler()
95 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in gfx_v11_0_3_poison_consumption_handler()
H A Dumc_v8_10.c341 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_correctable_error_count()
360 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_uncorrectable_error_count()
408 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_error_address()
H A Dumc_v8_7.c56 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_query_correctable_error_count()
75 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
137 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_query_error_address()
H A Damdgpu_umc.c99 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_umc_handle_bad_pages()
224 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_umc_do_page_retirement()
287 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_umc_pasid_poison_handler()
515 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_umc_logs_ecc_err()
H A Dumc_v6_7.c101 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_query_correctable_error_count()
143 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_querry_uncorrectable_error_count()
228 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_query_error_address()
H A Dpsp_v15_0_8.c193 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in psp_v15_0_8_get_ras_capability()
H A Dumc_v12_0.c527 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in umc_v12_0_update_ecc_status()
664 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in umc_v12_0_query_ras_ecc_err_addr()
H A Dmxgpu_ai.c345 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in xgpu_ai_mailbox_rcv_irq()
H A Daldebaran.c379 con = amdgpu_ras_get_context(tmp_adev); in aldebaran_mode2_restore_hwcontext()
H A Dsoc15.c508 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in soc15_asic_baco_reset()
531 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in soc15_asic_reset_method()
H A Dnbio_v7_9.c523 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in nbio_v7_9_handle_ras_controller_intr_no_bifring()
H A Dnbio_v7_4.c364 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in nbio_v7_4_handle_ras_controller_intr_no_bifring()
H A Damdgpu_ras.h961 struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev);
H A Dpsp_v13_0.c869 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in psp_v13_0_get_ras_capability()
H A Damdgpu_ctx.c581 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ctx_query2()
H A Damdgpu_device.c6198 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_device_stop_pending_resets()
6529 if (need_emergency_restart && amdgpu_ras_get_context(adev) && in amdgpu_device_gpu_recover()
6530 amdgpu_ras_get_context(adev)->reboot) { in amdgpu_device_gpu_recover()
6938 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_device_baco_enter()
6952 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_device_baco_exit()
H A Damdgpu_amdkfd_gpuvm.c174 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_amdkfd_reserve_mem_limit()
1669 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_amdkfd_get_available_memory()
H A Damdgpu_virt.c1621 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_virt_get_ras_capability()
H A Damdgpu_kms.c1296 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_info_ioctl()
/linux/drivers/gpu/drm/amd/ras/ras_mgr/ !
H A Damdgpu_ras_mgr.c286 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_mgr_sw_init()
341 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_mgr_sw_fini()
367 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_mgr_hw_init()
398 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_mgr_hw_fini()
558 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_mgr_reset_gpu()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ !
H A Dvega20_baco.c75 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in vega20_baco_set_state()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ !
H A Dsmu_v11_0.c1602 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in smu_v11_0_baco_set_state()