Searched refs:alerts (Results 1 – 20 of 20) sorted by relevance
190 What: /sys/devices/platform/dmi-ipmi-ssif.*/alerts210 alerts (RO) Number of alerts received.
124 u64 alerts; member
356 seq_printf(m, "DB Pacing Alerts\t: %llu\n", rdev->stats.pacing.alerts); in info_show()
801 rdev->stats.pacing.alerts++; in bnxt_re_db_fifo_check()
57 interface. It includes a number of programmable functions including alerts,
27 interface is I2C/SMbus. The TSC1641 allows the assertion of several alerts
36 flexibility in the autonomous generation of alerts and response to faults.
667 Otherwise the chip would block alerts from other chips in the bus as long
57 has capability for generating SDRAM temperature alerts
79 system temperature measurements and alerts.
23 (4) Device status monitoring, including interrupt-style alerts to the Master.
53 BRA transfers. This is convenient to e.g. deal with alerts, jack
221 (decrypted) application data, alerts, and handshake packets once the
597 ssif_inc_stat(ssif_info, alerts); in ssif_alert()1233 IPMI_SSIF_ATTR(alerts);
137 firmware alerts (like critical battery condition), or misled
280 * I2C drivers for devices which can trigger SMBus alerts should implement
224 u8 alerts; member
520 u32 alerts; in pmcraid_reset_type() local524 alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); in pmcraid_reset_type()527 (alerts & DOORBELL_IOA_RESET_ALERT) || in pmcraid_reset_type()
418 monitoring as well as alerts for battery over/under voltage and
870 audible alerts in various situations. This feature allows the same