Searched refs:a6xx_fenced_write (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_preempt.c | 54 a6xx_fenced_write(a6xx_gpu, REG_A6XX_CP_RB_WPTR, wptr, BIT(0), false); in update_wptr()
325 a6xx_fenced_write(a6xx_gpu, in a6xx_preempt_trigger()
329 a6xx_fenced_write(a6xx_gpu, in a6xx_preempt_trigger()
351 a6xx_fenced_write(a6xx_gpu, REG_A6XX_CP_CONTEXT_SWITCH_CNTL, cntl, BIT(1), false); in a6xx_preempt_trigger()
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| H A D | a6xx_gpu.h | 316 int a6xx_fenced_write(struct a6xx_gpu *gpu, u32 offset, u64 value, u32 mask, bool is_64b);
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| H A D | a6xx_gpu.c | 94 int a6xx_fenced_write(struct a6xx_gpu *a6xx_gpu, u32 offset, u64 value, u32 mask, bool is_64b) in a6xx_fenced_write() function
180 a6xx_fenced_write(a6xx_gpu, REG_A6XX_CP_RB_WPTR, wptr, BIT(0), false); in a6xx_flush()
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