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Searched refs:WM_B (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/
H A Ddcn301_fpu.c229 .wm_inst = WM_B,
266 .wm_inst = WM_B,
456 table_entry = &bw_params->wm_table.entries[WM_B]; in dcn301_fpu_calculate_wm_and_dlg()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c361 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid) { in dcn30_fpu_calculate_wm_and_dlg()
366 …ram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_l… in dcn30_fpu_calculate_wm_and_dlg()
367 ….sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.sr_enter… in dcn30_fpu_calculate_wm_and_dlg()
368 …context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_in… in dcn30_fpu_calculate_wm_and_dlg()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c203 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = dcfclk_mhz_for_the_… in dcn32_build_wm_range_table_fpu()
205 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = clk_mgr->base.bw_pa… in dcn32_build_wm_range_table_fpu()
223 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].valid = true; in dcn32_build_wm_range_table_fpu()
224 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us = pstate_latency_us; in dcn32_build_wm_range_table_fpu()
225 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.fclk_change_latency_us = fclk_change_… in dcn32_build_wm_range_table_fpu()
226 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn32_build_wm_range_table_fpu()
227 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.sr_enter_plus_exit_time_us = sr_enter… in dcn32_build_wm_range_table_fpu()
228 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn32_build_wm_range_table_fpu()
229 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()
230 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_uclk = setb_min_uclk_mhz; in dcn32_build_wm_range_table_fpu()
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/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h35 #define WM_B 1 macro
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c281 .wm_inst = WM_B,
318 .wm_inst = WM_B,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c778 .wm_inst = WM_B,
815 .wm_inst = WM_B,
852 .wm_inst = WM_B,
889 .wm_inst = WM_B,
926 .wm_inst = WM_B,
963 .wm_inst = WM_B,
2307 table_entry = &bw_params->wm_table.entries[WM_B]; in dcn21_calculate_wm()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c355 .wm_inst = WM_B,
392 .wm_inst = WM_B,
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c774 .wm_inst = WM_B,
811 .wm_inst = WM_B,
/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c44 #define WM_B 1 macro
1417 ranges.reader_wm_sets[1].wm_inst = WM_B; in dcn_bw_notify_pplib_of_wm_ranges()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
H A Ddcn401_clk_mgr.c197 clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid = false; in dcn401_build_wm_range_table()