Searched refs:VCS1 (Results 1 – 7 of 7) sorted by relevance
| /linux/drivers/gpu/drm/i915/gvt/ |
| H A D | mmio_context.c | 145 {VCS1, RING_EXCC(GEN8_BSD2_RING_BASE), 0xffff, false}, /* 0x1c028 */
173 [VCS1] = 0xca00,
360 [VCS1] = 0x4268,
417 [VCS1] = 0xca00, in switch_mocs()
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| H A D | cmd_parser.c | 434 #define R_VCS2 BIT(VCS1)
648 [VCS1] = {
1174 [VCS1] = {
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| H A D | handlers.c | 362 engine_mask |= BIT(VCS1); in gdrst_mmio_write()
2116 id = VCS1; in gvt_reg_tlb_control_handler()
2192 if (HAS_ENGINE(gvt->gt, VCS1)) \
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| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | intel_engine_types.h | 124 VCS1, enumerator
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| H A D | intel_engine_cs.c | 143 [VCS1] = {
413 [VCS1] = GEN11_GRDOM_MEDIA2, in get_reset_domain()
438 [VCS1] = GEN8_GRDOM_MEDIA2, in get_reset_domain()
1704 [VCS1] = MSG_IDLE_VCS1, in __cs_pending_mi_force_wakes()
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| H A D | intel_mocs.c | 573 [VCS1] = __GEN9_VCS1_MOCS0, in mocs_offset()
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| H A D | intel_execlists_submission.c | 3502 [VCS1] = GEN8_VCS1_IRQ_SHIFT, in logical_ring_default_irqs()
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