Searched refs:TRCSYNCPR (Results 1 – 4 of 4) sorted by relevance
61 CHECKREG(TRCSYNCPR, syncfreq); in etm4_cfg_map_reg_offset()
36 #define TRCSYNCPR 0x034 macro326 CASE_##op((val), TRCSYNCPR) \
538 etm4x_relaxed_write32(csa, config->syncfreq, TRCSYNCPR); in etm4_enable_hw()1917 state->trcsyncpr = etm4x_read32(csa, TRCSYNCPR); in __etm4_cpu_save()2048 etm4x_relaxed_write32(csa, state->trcsyncpr, TRCSYNCPR); in __etm4_cpu_restore()
628 TRCSYNCPR.PERIOD which is every 4096 bytes of trace by default.