Searched refs:TRCSSCSRn (Results 1 – 5 of 5) sorted by relevance
| /linux/drivers/hwtracing/coresight/ |
| H A D | coresight-etm4x.h | 79 #define TRCSSCSRn(n) (0x2A0 + (n * 4)) macro 413 CASE_##op((val), TRCSSCSRn(0)) \ 414 CASE_##op((val), TRCSSCSRn(1)) \ 415 CASE_##op((val), TRCSSCSRn(2)) \ 416 CASE_##op((val), TRCSSCSRn(3)) \ 417 CASE_##op((val), TRCSSCSRn(4)) \ 418 CASE_##op((val), TRCSSCSRn(5)) \ 419 CASE_##op((val), TRCSSCSRn(6)) \ 420 CASE_##op((val), TRCSSCSRn(7)) \
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| H A D | coresight-etm4x-cfg.c | 89 CHECKREGIDX(TRCSSCSRn(0), ss_status, idx, off_mask); in etm4_cfg_map_reg_offset()
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| H A D | coresight-etm4x-core.c | 573 etm4x_relaxed_write32(csa, config->ss_status[i], TRCSSCSRn(i)); in etm4_enable_hw() 1051 etm4x_relaxed_read32(csa, TRCSSCSRn(i)); in etm4_disable_hw() 1495 etm4x_relaxed_read32(csa, TRCSSCSRn(i)); in etm4_init_arch_data() 1953 state->trcsscsr[i] = etm4x_read32(csa, TRCSSCSRn(i)); in __etm4_cpu_save() 2083 etm4x_relaxed_write32(csa, state->trcsscsr[i], TRCSSCSRn(i)); in __etm4_cpu_restore()
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| /linux/arch/arm64/kvm/ |
| H A D | emulate-nested.c | 1663 SR_FGT(SYS_TRCSSCSR(0), HDFGRTR, TRCSSCSRn, 1), 1664 SR_FGT(SYS_TRCSSCSR(1), HDFGRTR, TRCSSCSRn, 1), 1665 SR_FGT(SYS_TRCSSCSR(2), HDFGRTR, TRCSSCSRn, 1), 1666 SR_FGT(SYS_TRCSSCSR(3), HDFGRTR, TRCSSCSRn, 1), 1667 SR_FGT(SYS_TRCSSCSR(4), HDFGRTR, TRCSSCSRn, 1), 1668 SR_FGT(SYS_TRCSSCSR(5), HDFGRTR, TRCSSCSRn, 1), 1669 SR_FGT(SYS_TRCSSCSR(6), HDFGRTR, TRCSSCSRn, 1), 1670 SR_FGT(SYS_TRCSSCSR(7), HDFGRTR, TRCSSCSRn, 1),
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| /linux/arch/arm64/tools/ |
| H A D | sysreg | 4245 Field 46 TRCSSCSRn 4309 Field 46 TRCSSCSRn
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