Searched refs:TOP_CFG00 (Results 1 – 2 of 2) sorted by relevance
| /linux/drivers/gpu/drm/mediatek/ |
| H A D | mtk_hdmi_v2.c | 92 regmap_set_bits(hdmi->regs, TOP_CFG00, SCR_ON | HDMI2_ON); in mtk_hdmi_v2_enable_scrambling()
94 regmap_clear_bits(hdmi->regs, TOP_CFG00, SCR_ON | HDMI2_ON); in mtk_hdmi_v2_enable_scrambling()
724 regmap_update_bits(hdmi->regs, TOP_CFG00, TMDS_PACK_MODE, in mtk_hdmi_v2_change_video_resolution()
727 regmap_clear_bits(hdmi->regs, TOP_CFG00, DEEPCOLOR_PKT_EN); in mtk_hdmi_v2_change_video_resolution()
732 regmap_set_bits(hdmi->regs, TOP_CFG00, HDMI_MODE_HDMI); in mtk_hdmi_v2_change_video_resolution()
734 regmap_clear_bits(hdmi->regs, TOP_CFG00, HDMI_MODE_HDMI); in mtk_hdmi_v2_change_video_resolution()
1203 regmap_clear_bits(hdmi->regs, TOP_CFG00, HDMI_ABIST_ENABLE); in mtk_hdmi_v2_set_abist()
1247 regmap_update_bits(hdmi->regs, TOP_CFG00, HDMI_ABIST_VIDEO_FORMAT, in mtk_hdmi_v2_set_abist()
1249 regmap_set_bits(hdmi->regs, TOP_CFG00, HDMI_ABIST_ENABLE); in mtk_hdmi_v2_set_abist()
1263 ret = regmap_read(hdmi->regs, TOP_CFG00, &val); in mtk_hdmi_v2_debug_abist_show()
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| H A D | mtk_hdmi_regs_v2.h | 13 #define TOP_CFG00 0x000 macro
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