Searched refs:SYSCLK_FIXED_DIV (Results 1 – 3 of 3) sorted by relevance
| /linux/drivers/clk/davinci/ |
| H A D | pll-da850.c | 43 * NB: Technically, the clocks flagged as SYSCLK_FIXED_DIV are "fixed ratio",
49 SYSCLK(1, pll0_sysclk1, pll0_pllen, 5, SYSCLK_FIXED_DIV);
50 SYSCLK(2, pll0_sysclk2, pll0_pllen, 5, SYSCLK_FIXED_DIV);
52 SYSCLK(4, pll0_sysclk4, pll0_pllen, 5, SYSCLK_FIXED_DIV);
54 SYSCLK(6, pll0_sysclk6, pll0_pllen, 5, SYSCLK_ARM_RATE | SYSCLK_FIXED_DIV);
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| H A D | pll.h | 53 #define SYSCLK_FIXED_DIV BIT(2) /* Fixed divider */ macro
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| H A D | pll.c | 711 if (info->flags & SYSCLK_FIXED_DIV) { in davinci_pll_sysclk_register()
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