| /linux/include/linux/mfd/ |
| H A D | idt82p33_reg.h | 10 #define REG_ADDR(page, offset) (((page) << 0x7) | ((offset) & 0x7f)) macro 45 #define OUT_MUX_CNFG(outn) REG_ADDR(0x6, (0xC * (outn)))
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| /linux/drivers/net/ethernet/apm/xgene-v2/ |
| H A D | mdio.c | 19 SET_REG_BITS(&val, REG_ADDR, reg); in xge_mdio_write() 43 SET_REG_BITS(&val, REG_ADDR, reg); in xge_mdio_read()
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| /linux/drivers/hwmon/ |
| H A D | ultra45_env.c | 37 #define REG_ADDR 0x41UL macro 74 writeb(ireg, p->regs + REG_ADDR); in env_read() 84 writeb(ireg, p->regs + REG_ADDR); in env_write()
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| /linux/drivers/net/ethernet/chelsio/cxgb/ |
| H A D | my3126.c | 35 #define OFFSET(REG_ADDR) (REG_ADDR << 2) argument
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| H A D | pm3393.c | 39 #define OFFSET(REG_ADDR) ((REG_ADDR) << 2) argument
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| /linux/drivers/net/ethernet/apm/xgene/ |
| H A D | xgene_enet_sgmac.h | 13 #define REG_ADDR(src) ((src) & GENMASK(4, 0)) macro
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| H A D | xgene_enet_sgmac.c | 119 addr = PHY_ADDR(phy_id) | REG_ADDR(reg); in xgene_mii_phy_write() 140 addr = PHY_ADDR(phy_id) | REG_ADDR(reg); in xgene_mii_phy_read()
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| /linux/drivers/net/ethernet/qlogic/qed/ |
| H A D | qed.h | 954 #define REG_ADDR(cdev, offset) ((void __iomem *)((u8 __iomem *)\ macro 958 #define REG_RD(cdev, offset) readl(REG_ADDR(cdev, offset)) 959 #define REG_WR(cdev, offset, val) writel((u32)val, REG_ADDR(cdev, offset)) 960 #define REG_WR16(cdev, offset, val) writew((u16)val, REG_ADDR(cdev, offset))
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| H A D | qed_hw.c | 253 reg_addr = (u32 __iomem *)REG_ADDR(p_hwfn, hw_offset); in qed_memcpy_hw()
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| /linux/drivers/iio/dac/ |
| H A D | mcp47feb02.c | 60 #define REG_ADDR(reg) ((reg) << 3) macro 563 ret = regmap_write(data->regmap, REG_ADDR(ch), data->chdata[ch].dac_data); in mcp47feb02_suspend() 586 ret = regmap_write(data->regmap, REG_ADDR(ch), data->chdata[ch].dac_data); in mcp47feb02_resume() 877 ret = regmap_read(data->regmap, REG_ADDR(ch->address), val); in mcp47feb02_read_raw() 899 ret = regmap_write(data->regmap, REG_ADDR(ch->address), val); in mcp47feb02_write_raw()
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| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x.h | 169 #define REG_ADDR(bp, offset) ((bp->regview) + (offset)) macro 171 #define REG_RD(bp, offset) readl(REG_ADDR(bp, offset)) 172 #define REG_RD8(bp, offset) readb(REG_ADDR(bp, offset)) 173 #define REG_RD16(bp, offset) readw(REG_ADDR(bp, offset)) 176 writel_relaxed((u32)val, REG_ADDR(bp, offset)) 179 writew_relaxed((u16)val, REG_ADDR(bp, offset)) 181 #define REG_WR(bp, offset, val) writel((u32)val, REG_ADDR(bp, offset)) 182 #define REG_WR8(bp, offset, val) writeb((u8)val, REG_ADDR(bp, offset)) 183 #define REG_WR16(bp, offset, val) writew((u16)val, REG_ADDR(bp, offset))
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| H A D | bnx2x_vfpf.c | 144 REG_ADDR(bp, PXP_VF_ADDR_CSDM_GLOBAL_START); in bnx2x_send_msg2pf()
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| /linux/drivers/net/mdio/ |
| H A D | mdio-xgene.c | 86 data = SET_VAL(PHY_ADDR, phy_id) | SET_VAL(REG_ADDR, reg); in xgene_mdio_rgmii_read() 112 val = SET_VAL(PHY_ADDR, phy_id) | SET_VAL(REG_ADDR, reg); in xgene_mdio_rgmii_write()
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| /linux/drivers/gpu/drm/panel/ |
| H A D | panel-raspberrypi-touchscreen.c | 61 enum REG_ADDR { enum
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| /linux/drivers/ptp/ |
| H A D | ptp_idt82p33.c | 1318 err = idt82p33_write(idt82p33, REG_ADDR(page, loaddr), in idt82p33_load_firmware()
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