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Searched refs:PNAME (Results 1 – 25 of 37) sorted by relevance

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/linux/drivers/clk/samsung/
H A Dclk-exynos2200.c737 PNAME(mout_cmu_cp_mpll_clk_d2_user_parents) = { "oscclk" };
738 PNAME(mout_cmu_cp_mpll_clk_user_parents) = { "oscclk" };
739 PNAME(mout_cmu_aud_audif0_p) = { "dout_shared0_div1",
746 PNAME(mout_cmu_aud_audif1_p) = { "dout_shared0_div1",
753 PNAME(mout_cmu_aud_cpu_p) = { "dout_shared0_div1",
761 PNAME(mout_cmu_cpucl0_dbg_noc_p) = { "dout_shared2_div1",
765 PNAME(mout_cmu_cpucl0_switch_p) = { "dout_shared0_div1",
772 PNAME(mout_cmu_cpucl1_switch_p) = { "dout_shared0_div1",
779 PNAME(mout_cmu_cpucl2_switch_p) = { "dout_shared0_div1",
786 PNAME(mout_cmu_dnc_noc_p) = { "dout_shared0_div1",
[all …]
H A Dclk-exynos990.c471 PNAME(mout_pll_shared0_p) = { "oscclk", "fout_shared0_pll" };
472 PNAME(mout_pll_shared1_p) = { "oscclk", "fout_shared1_pll" };
473 PNAME(mout_pll_shared2_p) = { "oscclk", "fout_shared2_pll" };
474 PNAME(mout_pll_shared3_p) = { "oscclk", "fout_shared3_pll" };
475 PNAME(mout_pll_shared4_p) = { "oscclk", "fout_shared4_pll" };
476 PNAME(mout_pll_mmc_p) = { "oscclk", "fout_mmc_pll" };
477 PNAME(mout_pll_g3d_p) = { "oscclk", "fout_g3d_pll" };
478 PNAME(mout_cmu_dpu_bus_p) = { "dout_cmu_dpu",
480 PNAME(mout_cmu_apm_bus_p) = { "dout_cmu_shared0_div2",
482 PNAME(mout_cmu_aud_cpu_p) = { "dout_cmu_shared0_div2",
[all …]
H A Dclk-exynos8895.c520 PNAME(mout_pll_shared0_p) = { "oscclk", "fout_shared0_pll" };
521 PNAME(mout_pll_shared1_p) = { "oscclk", "fout_shared1_pll" };
522 PNAME(mout_pll_shared2_p) = { "oscclk", "fout_shared2_pll" };
523 PNAME(mout_pll_shared3_p) = { "oscclk", "fout_shared3_pll" };
524 PNAME(mout_pll_shared4_p) = { "oscclk", "fout_shared4_pll" };
525 PNAME(mout_cp2ap_mif_clk_user_p) = { "oscclk" };
526 PNAME(mout_cmu_abox_cpuabox_p) = { "dout_cmu_shared0_div2",
530 PNAME(mout_cmu_apm_bus_p) = { "dout_cmu_shared0_div4",
532 PNAME(mout_cmu_bus1_bus_p) = { "fout_shared4_pll",
536 PNAME(mout_cmu_busc_bus_p) = { "fout_shared4_pll",
[all …]
H A Dclk-exynos5260.c100 PNAME(mout_aud_pll_user_p) = {"fin_pll", "fout_aud_pll"};
101 PNAME(mout_sclk_aud_i2s_p) = {"mout_aud_pll_user", "ioclk_i2s_cdclk"};
102 PNAME(mout_sclk_aud_pcm_p) = {"mout_aud_pll_user", "ioclk_pcm_extclk"};
181 PNAME(mout_phyclk_dptx_phy_ch3_txd_clk_user_p) = {"fin_pll",
183 PNAME(mout_phyclk_dptx_phy_ch2_txd_clk_user_p) = {"fin_pll",
185 PNAME(mout_phyclk_dptx_phy_ch1_txd_clk_user_p) = {"fin_pll",
187 PNAME(mout_phyclk_dptx_phy_ch0_txd_clk_user_p) = {"fin_pll",
189 PNAME(mout_aclk_disp_222_user_p) = {"fin_pll", "dout_aclk_disp_222"};
190 PNAME(mout_sclk_disp_pixel_user_p) = {"fin_pll", "dout_sclk_disp_pixel"};
191 PNAME(mout_aclk_disp_333_user_p) = {"fin_pll", "dout_aclk_disp_333"};
[all …]
H A Dclk-exynos7.c44 PNAME(mout_topc_aud_pll_ctrl_p) = { "fin_pll", "fout_aud_pll" };
45 PNAME(mout_topc_bus0_pll_ctrl_p) = { "fin_pll", "fout_bus0_pll" };
46 PNAME(mout_topc_bus1_pll_ctrl_p) = { "fin_pll", "fout_bus1_pll" };
47 PNAME(mout_topc_cc_pll_ctrl_p) = { "fin_pll", "fout_cc_pll" };
48 PNAME(mout_topc_mfc_pll_ctrl_p) = { "fin_pll", "fout_mfc_pll" };
50 PNAME(mout_topc_group2) = { "mout_topc_bus0_pll_half",
54 PNAME(mout_topc_bus0_pll_half_p) = { "mout_topc_bus0_pll",
56 PNAME(mout_topc_bus1_pll_half_p) = { "mout_topc_bus1_pll",
58 PNAME(mout_topc_cc_pll_half_p) = { "mout_topc_cc_pll",
60 PNAME(mout_topc_mfc_pll_half_p) = { "mout_topc_mfc_pll",
[all …]
H A Dclk-artpec8.c187 PNAME(mout_clkcmu_bus_bus_p) = { "dout_pll_shared1_div2", "dout_pll_shared0_div3",
189 PNAME(mout_clkcmu_bus_dlp_p) = { "dout_pll_shared0_div2", "dout_pll_shared0_div4",
191 PNAME(mout_clkcmu_core_bus_p) = { "dout_pll_shared1_div2", "dout_pll_shared0_div3",
193 PNAME(mout_clkcmu_core_dlp_p) = { "dout_pll_shared0_div2", "dout_pll_shared1_div2",
195 PNAME(mout_clkcmu_cpucl_switch_p) = { "dout_pll_shared0_div2", "dout_pll_shared1_div2",
197 PNAME(mout_clkcmu_fsys_bus_p) = { "dout_pll_shared1_div2", "dout_pll_shared0_div2",
199 PNAME(mout_clkcmu_fsys_ip_p) = { "dout_pll_shared0_div2", "dout_pll_shared1_div3",
201 PNAME(mout_clkcmu_fsys_scan0_p) = { "dout_pll_shared0_div4", "dout_pll_shared1_div4" };
202 PNAME(mout_clkcmu_fsys_scan1_p) = { "dout_pll_shared0_div4", "dout_pll_shared1_div4" };
203 PNAME(mout_clkcmu_imem_imem_p) = { "dout_pll_shared1_div4", "dout_pll_shared0_div3",
[all …]
H A Dclk-exynos7885.c166 PNAME(mout_shared0_pll_p) = { "oscclk", "fout_shared0_pll" };
167 PNAME(mout_shared1_pll_p) = { "oscclk", "fout_shared1_pll" };
170 PNAME(mout_core_bus_p) = { "dout_shared0_div2", "dout_shared1_div2",
172 PNAME(mout_core_cci_p) = { "dout_shared0_div2", "dout_shared1_div2",
174 PNAME(mout_core_g3d_p) = { "dout_shared0_div2", "dout_shared1_div2",
178 PNAME(mout_peri_bus_p) = { "dout_shared0_div4", "dout_shared1_div4" };
179 PNAME(mout_peri_spi0_p) = { "oscclk", "dout_shared0_div4" };
180 PNAME(mout_peri_spi1_p) = { "oscclk", "dout_shared0_div4" };
181 PNAME(mout_peri_uart0_p) = { "oscclk", "dout_shared0_div4" };
182 PNAME(mout_peri_uart1_p) = { "oscclk", "dout_shared0_div4" };
[all …]
H A Dclk-exynos850.c245 PNAME(mout_shared0_pll_p) = { "oscclk", "fout_shared0_pll" };
246 PNAME(mout_shared1_pll_p) = { "oscclk", "fout_shared1_pll" };
247 PNAME(mout_mmc_pll_p) = { "oscclk", "fout_mmc_pll" };
249 PNAME(mout_clkcmu_apm_bus_p) = { "dout_shared0_div4", "pll_shared1_div4" };
251 PNAME(mout_aud_p) = { "fout_shared1_pll", "dout_shared0_div2",
254 PNAME(mout_core_bus_p) = { "dout_shared1_div2", "dout_shared0_div3",
256 PNAME(mout_core_cci_p) = { "dout_shared0_div2", "dout_shared1_div2",
258 PNAME(mout_core_mmc_embd_p) = { "oscclk", "dout_shared0_div2",
262 PNAME(mout_core_sss_p) = { "dout_shared0_div3", "dout_shared1_div3",
265 PNAME(mout_cpucl0_switch_p) = { "fout_shared0_pll", "fout_shared1_pll",
[all …]
H A Dclk-exynos5433.c211 PNAME(mout_aud_pll_p) = { "oscclk", "fout_aud_pll", };
212 PNAME(mout_isp_pll_p) = { "oscclk", "fout_isp_pll", };
213 PNAME(mout_aud_pll_user_p) = { "oscclk", "mout_aud_pll", };
214 PNAME(mout_mphy_pll_user_p) = { "oscclk", "sclk_mphy_pll", };
215 PNAME(mout_mfc_pll_user_p) = { "oscclk", "sclk_mfc_pll", };
216 PNAME(mout_bus_pll_user_p) = { "oscclk", "sclk_bus_pll", };
217 PNAME(mout_bus_pll_user_t_p) = { "oscclk", "mout_bus_pll_user", };
218 PNAME(mout_mphy_pll_user_t_p) = { "oscclk", "mout_mphy_pll_user", };
220 PNAME(mout_bus_mfc_pll_user_p) = { "mout_bus_pll_user", "mout_mfc_pll_user",};
221 PNAME(mout_mfc_bus_pll_user_p) = { "mout_mfc_pll_user", "mout_bus_pll_user",};
[all …]
H A Dclk-exynosautov9.c367 PNAME(mout_shared0_pll_p) = { "oscclk", "fout_shared0_pll" };
368 PNAME(mout_shared1_pll_p) = { "oscclk", "fout_shared1_pll" };
369 PNAME(mout_shared2_pll_p) = { "oscclk", "fout_shared2_pll" };
370 PNAME(mout_shared3_pll_p) = { "oscclk", "fout_shared3_pll" };
371 PNAME(mout_shared4_pll_p) = { "oscclk", "fout_shared4_pll" };
373 PNAME(mout_clkcmu_cmu_boost_p) = { "dout_shared2_div3", "dout_shared1_div4",
375 PNAME(mout_clkcmu_cmu_cmuref_p) = { "oscclk", "dout_cmu_boost" };
376 PNAME(mout_clkcmu_acc_bus_p) = { "dout_shared1_div3", "dout_shared2_div3",
378 PNAME(mout_clkcmu_apm_bus_p) = { "dout_shared2_div3", "dout_shared1_div4",
380 PNAME(mout_clkcmu_aud_cpu_p) = { "dout_shared0_div2", "dout_shared1_div2",
[all …]
H A Dclk-exynos7870.c307 PNAME(mout_mif_cmu_dispaud_bus_p) = { "ffac_mif_mux_bus_pll_div2",
309 PNAME(mout_mif_cmu_dispaud_decon_eclk_p) = { "ffac_mif_mux_bus_pll_div2",
311 PNAME(mout_mif_cmu_dispaud_decon_vclk_p) = { "ffac_mif_mux_bus_pll_div2",
313 PNAME(mout_mif_cmu_fsys_bus_p) = { "ffac_mif_mux_bus_pll_div2",
315 PNAME(mout_mif_cmu_fsys_mmc0_p) = { "ffac_mif_mux_bus_pll_div2",
317 PNAME(mout_mif_cmu_fsys_mmc1_p) = { "ffac_mif_mux_bus_pll_div2",
319 PNAME(mout_mif_cmu_fsys_mmc2_p) = { "ffac_mif_mux_bus_pll_div2",
321 PNAME(mout_mif_cmu_fsys_usb20drd_refclk_p) = { "ffac_mif_mux_bus_pll_div2",
323 PNAME(mout_mif_cmu_isp_cam_p) = { "ffac_mif_mux_bus_pll_div2",
325 PNAME(mout_mif_cmu_isp_isp_p) = { "ffac_mif_mux_bus_pll_div2",
[all …]
H A Dclk-exynos5410.c68 PNAME(apll_p) = { "fin_pll", "fout_apll", };
69 PNAME(bpll_p) = { "fin_pll", "fout_bpll", };
70 PNAME(cpll_p) = { "fin_pll", "fout_cpll" };
71 PNAME(epll_p) = { "fin_pll", "fout_epll" };
72 PNAME(mpll_p) = { "fin_pll", "fout_mpll", };
73 PNAME(kpll_p) = { "fin_pll", "fout_kpll", };
75 PNAME(mout_cpu_p) = { "mout_apll", "sclk_mpll", };
76 PNAME(mout_kfc_p) = { "mout_kpll", "sclk_mpll", };
78 PNAME(mpll_user_p) = { "fin_pll", "sclk_mpll", };
79 PNAME(bpll_user_p) = { "fin_pll", "sclk_bpll", };
[all …]
/linux/drivers/clk/rockchip/
H A Dclk-rk3568.c219 PNAME(mux_pll_p) = { "xin24m" };
220 PNAME(mux_usb480m_p) = { "xin24m", "usb480m_phy", "clk_rtc_32k" };
221 PNAME(mux_usb480m_phy_p) = { "clk_usbphy0_480m", "clk_usbphy1_480m"};
222 PNAME(mux_armclk_p) = { "apll", "gpll" };
223 PNAME(clk_i2s0_8ch_tx_p) = { "clk_i2s0_8ch_tx_src", "clk_i2s0_8ch_tx_frac", "i2s0_mclkin", "xin_os…
224 PNAME(clk_i2s0_8ch_rx_p) = { "clk_i2s0_8ch_rx_src", "clk_i2s0_8ch_rx_frac", "i2s0_mclkin", "xin_os…
225 PNAME(clk_i2s1_8ch_tx_p) = { "clk_i2s1_8ch_tx_src", "clk_i2s1_8ch_tx_frac", "i2s1_mclkin", "xin_os…
226 PNAME(clk_i2s1_8ch_rx_p) = { "clk_i2s1_8ch_rx_src", "clk_i2s1_8ch_rx_frac", "i2s1_mclkin", "xin_os…
227 PNAME(clk_i2s2_2ch_p) = { "clk_i2s2_2ch_src", "clk_i2s2_2ch_frac", "i2s2_mclkin", "xin_osc0_half …
228 PNAME(clk_i2s3_2ch_tx_p) = { "clk_i2s3_2ch_tx_src", "clk_i2s3_2ch_tx_frac", "i2s3_mclkin", "xin_os…
[all …]
H A Dclk-rk3308.c122 PNAME(mux_pll_p) = { "xin24m" };
123 PNAME(mux_usb480m_p) = { "xin24m", "usb480m_phy", "clk_rtc32k" };
124 PNAME(mux_armclk_p) = { "apll_core", "vpll0_core", "vpll1_core" };
125 PNAME(mux_dpll_vpll0_p) = { "dpll", "vpll0" };
126 PNAME(mux_dpll_vpll0_xin24m_p) = { "dpll", "vpll0", "xin24m" };
127 PNAME(mux_dpll_vpll0_vpll1_p) = { "dpll", "vpll0", "vpll1" };
128 PNAME(mux_dpll_vpll0_vpll1_xin24m_p) = { "dpll", "vpll0", "vpll1", "xin24m" };
129 PNAME(mux_dpll_vpll0_vpll1_usb480m_xin24m_p) = { "dpll", "vpll0", "vpll1", "usb480m", "xin24m" };
130 PNAME(mux_vpll0_vpll1_p) = { "vpll0", "vpll1" };
131 PNAME(mux_vpll0_vpll1_xin24m_p) = { "vpll0", "vpll1", "xin24m" };
[all …]
H A Dclk-rv1126b.c85 PNAME(mux_pll_p) = { "xin24m" };
86 PNAME(mux_gpll_cpll_p) = { "gpll", "cpll" };
87 PNAME(mux_gpll_aupll_p) = { "gpll", "aupll" };
88 PNAME(mux_gpll_aupll_cpll_p) = { "gpll", "aupll", "cpll" };
89 PNAME(mux_gpll_cpll_24m_p) = { "gpll", "cpll", "xin24m" };
90 PNAME(mux_cpll_24m_p) = { "cpll", "xin24m" };
91 PNAME(mux_24m_gpll_aupll_cpll_p) = { "xin24m", "gpll", "aupll", "cpll" };
92 PNAME(mux_24m_gpll_cpll_p) = { "xin24m", "gpll", "cpll" };
93 PNAME(mux_24m_gpll_aupll_p) = { "xin24m", "gpll", "aupll" };
94 PNAME(mux_sclk_uart_src_p) = { "xin24m", "clk_cm_frac0", "clk_cm_frac1",
[all …]
H A Dclk-px30.c137 PNAME(mux_pll_p) = { "xin24m"};
138 PNAME(mux_usb480m_p) = { "xin24m", "usb480m_phy", "clk_rtc32k_pmu" };
139 PNAME(mux_armclk_p) = { "apll_core", "gpll_core" };
140 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
141 PNAME(mux_ddrstdby_p) = { "clk_ddrphy1x", "clk_stdby_2wrap" };
142 PNAME(mux_4plls_p) = { "gpll", "dummy_cpll", "usb480m", "npll" };
143 PNAME(mux_cpll_npll_p) = { "cpll", "npll" };
144 PNAME(mux_npll_cpll_p) = { "npll", "cpll" };
145 PNAME(mux_gpll_cpll_p) = { "gpll", "dummy_cpll" };
146 PNAME(mux_gpll_npll_p) = { "gpll", "npll" };
[all …]
H A Dclk-rv1108.c119 PNAME(mux_pll_p) = { "xin24m", "xin24m"};
120 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr", "apll_ddr" };
121 PNAME(mux_armclk_p) = { "apll_core", "gpll_core", "dpll_core" };
122 PNAME(mux_usb480m_pre_p) = { "usbphy", "xin24m" };
123 PNAME(mux_hdmiphy_phy_p) = { "hdmiphy", "xin24m" };
124 PNAME(mux_dclk_hdmiphy_pre_p) = { "dclk_hdmiphy_src_gpll", "dclk_hdmiphy_src_dpll" };
125 PNAME(mux_pll_src_4plls_p) = { "dpll", "gpll", "hdmiphy", "usb480m" };
126 PNAME(mux_pll_src_2plls_p) = { "dpll", "gpll" };
127 PNAME(mux_pll_src_apll_gpll_p) = { "apll", "gpll" };
128 PNAME(mux_aclk_peri_src_p) = { "aclk_peri_src_gpll", "aclk_peri_src_dpll" };
[all …]
H A Dclk-rk3588.c425 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
426 PNAME(mux_armclkl_p) = { "xin24m", "gpll", "lpll" };
427 PNAME(mux_armclkb01_p) = { "xin24m", "gpll", "b0pll",};
428 PNAME(mux_armclkb23_p) = { "xin24m", "gpll", "b1pll",};
429 PNAME(b0pll_b1pll_lpll_gpll_p) = { "b0pll", "b1pll", "lpll", "gpll" };
430 PNAME(gpll_24m_p) = { "gpll", "xin24m" };
431 PNAME(gpll_aupll_p) = { "gpll", "aupll" };
432 PNAME(gpll_lpll_p) = { "gpll", "lpll" };
433 PNAME(gpll_cpll_p) = { "gpll", "cpll" };
434 PNAME(gpll_spll_p) = { "gpll", "spll" };
[all …]
H A Dclk-rk3228.c132 PNAME(mux_pll_p) = { "clk_24m", "xin24m" };
134 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr", "apll_ddr" };
135 PNAME(mux_armclk_p) = { "apll_core", "gpll_core", "dpll_core" };
136 PNAME(mux_usb480m_phy_p) = { "usb480m_phy0", "usb480m_phy1" };
137 PNAME(mux_usb480m_p) = { "usb480m_phy", "xin24m" };
138 PNAME(mux_hdmiphy_p) = { "hdmiphy_phy", "xin24m" };
139 PNAME(mux_aclk_cpu_src_p) = { "cpll_aclk_cpu", "gpll_aclk_cpu", "hdmiphy_aclk_cpu" };
141 PNAME(mux_pll_src_4plls_p) = { "cpll", "gpll", "hdmiphy", "usb480m" };
142 PNAME(mux_pll_src_3plls_p) = { "cpll", "gpll", "hdmiphy" };
143 PNAME(mux_pll_src_2plls_p) = { "cpll", "gpll" };
[all …]
H A Dclk-rk3576.c280 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
281 PNAME(mux_24m_32k_p) = { "xin24m", "xin_osc0_div" };
282 PNAME(mux_armclkl_p) = { "xin24m", "pll_lpll", "lpll" };
283 PNAME(mux_armclkb_p) = { "xin24m", "pll_bpll", "bpll" };
284 PNAME(gpll_24m_p) = { "gpll", "xin24m" };
285 PNAME(cpll_24m_p) = { "cpll", "xin24m" };
286 PNAME(gpll_cpll_p) = { "gpll", "cpll" };
287 PNAME(gpll_spll_p) = { "gpll", "spll" };
288 PNAME(gpll_cpll_aupll_p) = { "gpll", "cpll", "aupll" };
289 PNAME(gpll_cpll_24m_p) = { "gpll", "cpll", "xin24m" };
[all …]
H A Dclk-rv1126.c145 PNAME(mux_pll_p) = { "xin24m" };
146 PNAME(mux_rtc32k_p) = { "clk_pmupvtm_divout", "xin32k", "clk_osc0_div32k" };
147 PNAME(mux_wifi_p) = { "clk_wifi_osc0", "clk_wifi_div" };
148 PNAME(mux_gpll_usb480m_cpll_xin24m_p) = { "gpll", "usb480m", "cpll", "xin24m" };
149 PNAME(mux_uart1_p) = { "sclk_uart1_div", "sclk_uart1_fracdiv", "xin24m" };
150 PNAME(mux_xin24m_gpll_p) = { "xin24m", "gpll" };
151 PNAME(mux_gpll_xin24m_p) = { "gpll", "xin24m" };
152 PNAME(mux_xin24m_32k_p) = { "xin24m", "clk_rtc32k" };
153 PNAME(mux_usbphy_otg_ref_p) = { "clk_ref12m", "xin_osc0_div2_usbphyref_otg" };
154 PNAME(mux_usbphy_host_ref_p) = { "clk_ref12m", "xin_osc0_div2_usbphyref_host" };
[all …]
H A Dclk-rk3328.c143 PNAME(mux_pll_p) = { "xin24m" };
145 PNAME(mux_2plls_p) = { "cpll", "gpll" };
146 PNAME(mux_gpll_cpll_p) = { "gpll", "cpll" };
147 PNAME(mux_cpll_gpll_apll_p) = { "cpll", "gpll", "apll" };
148 PNAME(mux_2plls_xin24m_p) = { "cpll", "gpll", "xin24m" };
149 PNAME(mux_2plls_hdmiphy_p) = { "cpll", "gpll",
151 PNAME(mux_4plls_p) = { "cpll", "gpll",
154 PNAME(mux_2plls_u480m_p) = { "cpll", "gpll",
156 PNAME(mux_2plls_24m_u480m_p) = { "cpll", "gpll",
159 PNAME(mux_ddrphy_p) = { "dpll", "apll", "cpll" };
[all …]
H A Dclk-rk3506.c108 PNAME(mux_pll_p) = { "xin24m" };
109 PNAME(gpll_v0pll_v1pll_parents_p) = { "gpll", "v0pll", "v1pll" };
110 PNAME(gpll_v0pll_v1pll_g_parents_p) = { "clk_gpll_gate", "clk_v0pll_gate", "clk_v1pll_gate" };
111 PNAME(gpll_v0pll_v1pll_div_parents_p) = { "clk_gpll_div", "clk_v0pll_div", "clk_v1pll_div" };
112 PNAME(xin24m_gpll_v0pll_v1pll_g_parents_p) = { "xin24m", "clk_gpll_gate", "clk_v0pll_gate", "clk_v1…
113 PNAME(xin24m_g_gpll_v0pll_v1pll_g_parents_p) = { "xin24m_gate", "clk_gpll_gate", "clk_v0pll_gate", …
114 PNAME(xin24m_g_gpll_v0pll_v1pll_div_parents_p) = { "xin24m_gate", "clk_gpll_div", "clk_v0pll_div", …
115 PNAME(xin24m_400k_32k_parents_p) = { "xin24m", "clk_rc", "clk_32k" };
116 PNAME(clk_frac_uart_matrix0_mux_parents_p) = { "xin24m", "gpll", "clk_v0pll_gate", "clk_v1pll_gate"…
117 PNAME(clk_timer0_parents_p) = { "xin24m", "clk_gpll_div_100m", "clk_32k", "clk_core_pvtpll", "sai…
[all …]
H A Dclk-rk3399.c109 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
111 PNAME(mux_armclkl_p) = { "clk_core_l_lpll_src",
115 PNAME(mux_armclkb_p) = { "clk_core_b_lpll_src",
119 PNAME(mux_ddrclk_p) = { "clk_ddrc_lpll_src",
123 PNAME(mux_aclk_cci_p) = { "cpll_aclk_cci_src",
127 PNAME(mux_cci_trace_p) = { "cpll_cci_trace",
129 PNAME(mux_cs_p) = { "cpll_cs", "gpll_cs",
131 PNAME(mux_aclk_perihp_p) = { "cpll_aclk_perihp_src",
134 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" };
135 PNAME(mux_pll_src_cpll_gpll_npll_p) = { "cpll", "gpll", "npll" };
[all …]
/linux/drivers/clk/pistachio/
H A Dclk-pistachio.c105 PNAME(mux_xtal_audio_refclk) = { "xtal", "audio_clk_in_gate" };
106 PNAME(mux_xtal_mips) = { "xtal", "mips_pll" };
107 PNAME(mux_xtal_audio) = { "xtal", "audio_pll", "audio_in" };
108 PNAME(mux_audio_debug) = { "audio_pll_mux", "debug_mux" };
109 PNAME(mux_xtal_rpu_v) = { "xtal", "rpu_v_pll" };
110 PNAME(mux_xtal_rpu_l) = { "xtal", "rpu_l_pll" };
111 PNAME(mux_rpu_l_mips) = { "rpu_l_pll_mux", "mips_pll_mux" };
112 PNAME(mux_xtal_wifi) = { "xtal", "wifi_pll" };
113 PNAME(mux_xtal_wifi_div4) = { "xtal", "wifi_div4" };
114 PNAME(mux_xtal_wifi_div8) = { "xtal", "wifi_div8" };
[all …]

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