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Searched refs:PIC32_SET (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/tty/serial/
H A Dpic32_uart.c151 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_set_mctrl()
222 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), in pic32_uart_start_tx()
248 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), in pic32_uart_break_ctl()
430 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_STA), in pic32_uart_en_and_unmask()
432 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_en_and_unmask()
612 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_set_termios()
621 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_set_termios()
626 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_set_termios()
639 pic32_uart_writel(sport, PIC32_SET(PIC32_UART_MODE), in pic32_uart_set_termios()
/linux/drivers/rtc/
H A Drtc-pic32.c105 base + (enabled ? PIC32_SET(PIC32_RTCALRM) : in pic32_rtc_setaie()
123 writel(freq << 8, base + PIC32_SET(PIC32_RTCALRM)); in pic32_rtc_setfreq()
124 writel(PIC32_RTCALRM_CHIME, base + PIC32_SET(PIC32_RTCALRM)); in pic32_rtc_setfreq()
277 writel(PIC32_RTCCON_RTCWREN, base + PIC32_SET(PIC32_RTCCON)); in pic32_rtc_enable()
281 writel(PIC32_RTCCON_ON, base + PIC32_SET(PIC32_RTCCON)); in pic32_rtc_enable()
/linux/include/linux/platform_data/
H A Dpic32.h15 #define PIC32_SET(_reg) ((_reg) + 0x08) macro
/linux/drivers/clk/microchip/
H A Dclk-core.c107 writel(PB_DIV_ENABLE, PIC32_SET(pb->ctrl_reg)); in pbclk_enable()
259 writel(REFO_ON | REFO_OE, PIC32_SET(refo->ctrl_reg)); in roclk_enable()
519 writel(REFO_ON | REFO_DIVSW_EN, PIC32_SET(refo->ctrl_reg)); in roclk_set_rate_and_parent()
849 writel(OSC_SWEN, PIC32_SET(sclk->mux_reg)); in sclk_set_parent()
961 writel(sosc->enable_mask, PIC32_SET(sosc->enable_reg)); in sosc_clk_enable()
/linux/drivers/pinctrl/
H A Dpinctrl-pic32.c1818 writel(mask, bank->reg_base + PIC32_SET(TRIS_REG)); in pic32_gpio_direction_input()
1837 writel(mask, bank->reg_base + PIC32_SET(PORT_REG)); in pic32_gpio_set()
1941 writel(mask, bank->reg_base +PIC32_SET(CNPU_REG)); in pic32_pinconf_set()
1945 writel(mask, bank->reg_base + PIC32_SET(CNPD_REG)); in pic32_pinconf_set()
1953 writel(mask, bank->reg_base + PIC32_SET(ANSEL_REG)); in pic32_pinconf_set()
1957 writel(mask, bank->reg_base + PIC32_SET(ODCU_REG)); in pic32_pinconf_set()
2020 writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_SET(CNCON_REG)); in pic32_gpio_irq_unmask()
2041 writel(mask, bank->reg_base + PIC32_SET(CNEN_REG)); in pic32_gpio_irq_set_type()
2045 writel(BIT(PIC32_CNCON_EDGE), bank->reg_base + PIC32_SET(CNCON_REG)); in pic32_gpio_irq_set_type()
2051 writel(mask, bank->reg_base + PIC32_SET(CNNE_REG)); in pic32_gpio_irq_set_type()
[all …]
/linux/arch/mips/pic32/pic32mzda/
H A Dearly_console.c61 uart_base + PIC32_SET(U_STA(port))); in configure_uart()
/linux/drivers/watchdog/
H A Dpic32-dmt.c48 writel(DMT_ON, PIC32_SET(dmt->regs + DMTCON_REG)); in dmt_enable()
H A Dpic32-wdt.c109 writel(WDTCON_ON, PIC32_SET(wdt->regs + WDTCON_REG)); in pic32_wdt_start()