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Searched refs:MI_BATCH_BUFFER_END (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/gpu/drm/xe/
H A Dxe_bb.c102 if (bb->len == 0 || bb->cs[bb->len - 1] != MI_BATCH_BUFFER_END) in __xe_bb_create_job()
103 bb->cs[bb->len++] = MI_BATCH_BUFFER_END; in __xe_bb_create_job()
H A Dxe_sriov_vf_ccs.c170 xe_map_wr(xe, &sa_manager->bo->vmap, offset, u32, MI_BATCH_BUFFER_END); in alloc_bb_pool()
171 xe_map_wr(xe, &sa_manager->shadow->vmap, offset, u32, MI_BATCH_BUFFER_END); in alloc_bb_pool()
H A Dxe_pxp_submit.c312 emit_cmd(pxp->xe, &pxp->vcs_exec.bo->vmap, offset, MI_BATCH_BUFFER_END); in xe_pxp_submit_session_termination()
408 xe_map_wr(xe, batch, len++ * sizeof(u32), u32, MI_BATCH_BUFFER_END); in emit_pxp_heci_cmd()
H A Dxe_migrate.c979 bb->cs[bb->len++] = MI_BATCH_BUFFER_END; in xe_migrate_copy()
1349 bb->cs[bb->len++] = MI_BATCH_BUFFER_END; in xe_migrate_vram_copy_chunk()
1576 bb->cs[bb->len++] = MI_BATCH_BUFFER_END; in xe_migrate_clear()
1878 bb->cs[bb->len++] = MI_BATCH_BUFFER_END; in __xe_migrate_update_pgtables()
1898 bb->cs[bb->len++] = MI_BATCH_BUFFER_END; in __xe_migrate_update_pgtables()
2193 bb->cs[bb->len++] = MI_BATCH_BUFFER_END; in xe_migrate_vram()
H A Dxe_lrc.c224 *regs = MI_BATCH_BUFFER_END | BIT(0); in set_offsets()
1310 *state.ptr++ = MI_BATCH_BUFFER_END; in xe_lrc_setup_wa_bb_with_scratch()
1883 case MI_BATCH_BUFFER_END: in dump_mi_command()
/linux/drivers/gpu/drm/i915/selftests/
H A Digt_spinner.c197 *batch++ = MI_BATCH_BUFFER_END; /* not reached */ in igt_spinner_create_request()
233 *spin->batch = MI_BATCH_BUFFER_END; in igt_spinner_end()
H A Di915_request.c978 *cmd = MI_BATCH_BUFFER_END; in empty_batch()
1158 *cmd++ = MI_BATCH_BUFFER_END; /* terminate early in case of error */ in recursive_batch()
1180 *cmd = MI_BATCH_BUFFER_END; in recursive_batch_resolve()
1440 *cmd = MI_BATCH_BUFFER_END; in live_sequential_engines()
/linux/drivers/gpu/drm/xe/instructions/
H A Dxe_mi_commands.h32 #define MI_BATCH_BUFFER_END __MI_INSTR(0xA) macro
/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_engine_cs.c96 cs[0] = MI_BATCH_BUFFER_END; in create_empty_batch()
237 cs[SZ_64K / sizeof(*cs) - 1] = MI_BATCH_BUFFER_END; in create_nop_batch()
H A Dselftest_lrc.c256 } while (!err && (lrc[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END); in live_lrc_layout()
1047 (hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END); in store_context()
1049 *cs++ = MI_BATCH_BUFFER_END; in store_context()
1205 (hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END); in load_context()
1207 *cs++ = MI_BATCH_BUFFER_END; in load_context()
1370 (hw[dw] & ~BIT(0)) != MI_BATCH_BUFFER_END); in compare_isolation()
H A Dintel_renderstate.c126 OUT_BATCH(d, i, MI_BATCH_BUFFER_END); in render_state_setup()
H A Dselftest_ring_submission.c57 *cs++ = MI_BATCH_BUFFER_END; in create_wally()
H A Dintel_gpu_commands.h62 #define MI_BATCH_BUFFER_END MI_INSTR(0x0a, 0) macro
H A Dselftest_hangcheck.c225 *batch++ = MI_BATCH_BUFFER_END; /* not reached */ in hang_create_request()
260 *h->batch = MI_BATCH_BUFFER_END; in hang_fini()
316 *h.batch = MI_BATCH_BUFFER_END; in igt_hang_sanitycheck()
1771 *h.batch = MI_BATCH_BUFFER_END; in igt_reset_queue()
H A Dselftest_tlb.c185 *cs = MI_BATCH_BUFFER_END; in pte_tlbinv()
H A Dgen7_renderclear.c429 batch_add(&cmds, MI_BATCH_BUFFER_END); in emit_batch()
H A Dselftest_workarounds.c612 *cs++ = MI_BATCH_BUFFER_END; in check_dirty_whitelist()
917 *cs++ = MI_BATCH_BUFFER_END; in scrub_whitelisted_registers()
H A Dselftest_execlists.c2760 *cs++ = MI_BATCH_BUFFER_END; in create_gang()
3117 *cs++ = MI_BATCH_BUFFER_END; in create_gpr_user()
3669 cs[n] = MI_BATCH_BUFFER_END; in live_preempt_smoke()
/linux/drivers/gpu/drm/i915/gem/selftests/
H A Digt_gem_utils.c87 *cmd = MI_BATCH_BUFFER_END; in igt_emit_store_dw()
H A Di915_gem_context.c929 *cmd = MI_BATCH_BUFFER_END; in rpcs_query_batch()
1540 *cmd = MI_BATCH_BUFFER_END; in write_to_scratch()
1646 *cmd = MI_BATCH_BUFFER_END; in read_from_scratch()
1680 *cmd = MI_BATCH_BUFFER_END; in read_from_scratch()
H A Di915_gem_client_blt.c253 *cs++ = MI_BATCH_BUFFER_END; in prepare_blit()
H A Di915_gem_mman.c1573 bbe = MI_BATCH_BUFFER_END; in __igt_mmap_gpu()
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_gsc_uc_heci_cmd_submit.c136 *cmd++ = MI_BATCH_BUFFER_END; in emit_gsc_heci_pkt_nonpriv()
/linux/drivers/gpu/drm/i915/
H A Di915_cmd_parser.c1486 if (*cmd == MI_BATCH_BUFFER_END) in intel_engine_cmd_parser()
1547 *batch_end = MI_BATCH_BUFFER_END; in intel_engine_cmd_parser()
1552 *cmd = MI_BATCH_BUFFER_END; in intel_engine_cmd_parser()
H A Di915_perf.c2136 *cs++ = MI_BATCH_BUFFER_END; in alloc_noa_wait()