| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_mode_vba_util_32.h | 127 unsigned int HActive[], 173 unsigned int HActive[], 218 unsigned int HActive, 258 unsigned int HActive, 294 unsigned int HActive, 316 unsigned int HActive, 324 unsigned int HActive,
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| H A D | display_mode_vba_util_32.c | 438 unsigned int HActive[], in dml32_CalculateSwathAndDETConfiguration() 501 HActive, in dml32_CalculateSwathAndDETConfiguration() 705 unsigned int HActive[], in dml32_CalculateSwathWidth() 754 dml_round(HActive[k] / 4.0 * HRatio[k])); in dml32_CalculateSwathWidth() 757 dml_round(HActive[k] / 2.0 * HRatio[k])); in dml32_CalculateSwathWidth() 766 dml_print("DML::%s: k=%d HActive=%d\n", __func__, k, HActive[k]); in dml32_CalculateSwathWidth() 1183 unsigned int HActive, in dml32_CalculateODMMode() argument 1232 (DSCEnable && (HActive > 2 * MaximumPixelsPerLinePerDSCUnit)) in dml32_CalculateODMMode() 1244 (DSCEnable && (HActive > MaximumPixelsPerLinePerDSCUnit)) in dml32_CalculateODMMode() 1259 if (OutFormat == dm_420 && HActive > DCN32_MAX_FMT_420_BUFFER_WIDTH && in dml32_CalculateODMMode() [all …]
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| H A D | display_mode_vba_32.c | 191 mode_lib->vba.HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 271 mode_lib->vba.HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 367 mode_lib->vba.HActive[k], mode_lib->vba.HTotal[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 778 …eepPrefetchParametersWatermarksAndPerformanceCalculation.myPipe.HActive = mode_lib->vba.HActive[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1999 mode_lib->vba.HActive, in dml32_ModeSupportAndSystemConfigurationFull() 2043 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull() 2066 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull() 2096 mode_lib->vba.HActive[k], in dml32_ModeSupportAndSystemConfigurationFull() 2422 mode_lib->vba.HActive[k], mode_lib->vba.AudioSampleRate[k], in dml32_ModeSupportAndSystemConfigurationFull() 2493 if (mode_lib->vba.HActive[k] in dml32_ModeSupportAndSystemConfigurationFull() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_mode_vba_314.c | 566 int HActive[], 599 int HActive[], 2201 v->HActive, 2277 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 2286 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 2295 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 2300 …Delay[k] = v->DSCDelay[k] + (v->HTotal[k] - v->HActive[k]) * dml_ceil((double) v->DSCDelay[k] / v-… 3347 v->HActive, 3691 int HActive, argument 4134 v->HActive, [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_mode_vba_31.c | 558 int HActive[], 591 int HActive[], 2183 v->HActive, 2259 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 2268 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 2277 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), 3329 v->HActive, 3585 int HActive, argument 4044 v->HActive, 4098 if (v->HActive[k] / 2 > DCN31_MAX_FMT_420_BUFFER_WIDTH) [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | display_mode_core.c | 83 dml_uint_t HActive, 106 dml_uint_t HActive, 378 dml_uint_t HActive, 449 dml_uint_t HActive, 604 dml_uint_t HActive[], 739 dml_uint_t HActive, 1124 …1to2 || p->myPipe->ODMMode == dml_odm_mode_mso_1to2) ? (dml_float_t)p->myPipe->HActive / 2.0 : 0) + in CalculatePrefetchSchedule() 1125 …((p->myPipe->ODMMode == dml_odm_mode_mso_1to4) ? (dml_float_t)p->myPipe->HActive * 3.0 / 4.0 : 0),… in CalculatePrefetchSchedule() 2710 dml_uint_t HActive, in TruncToValidBPP() argument 4135 p->HActive, in CalculateSwathAndDETConfiguration() [all …]
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| H A D | dml2_utils.c | 43 dml_timing_array->HActive[dst_index] = dml_timing_array->HActive[src_index]; in dml2_util_copy_dml_timing()
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| H A D | display_mode_core_structs.h | 468 dml_uint_t HActive; member 610 dml_uint_t HActive[__DML_NUM_PLANES__]; member 1501 dml_uint_t *HActive; member
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| H A D | dml_display_rq_dlg_calc.c | 212 dml_uint_t hactive = timing->HActive[plane_idx]; in dml_rq_dlg_get_dlg_reg()
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| H A D | display_mode_util.c | 532 dml_print("DML: timing_cfg: plane=%d, HActive = %d\n", i, timing->HActive[i]); in dml_print_dml_display_cfg_timing()
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| H A D | dml2_translation_helper.c | 759 …out->HActive[location] = in->timing.h_addressable + in->timing.h_border_left + in->timing.h_border… in populate_dml_timing_cfg_from_stream_state()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_mode_vba_30.c | 505 int HActive[], 538 unsigned int HActive[], 1959 v->HActive, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2034 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2042 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2050 dml_ceil((double) v->HActive[k] / v->NumberOfDSCSlices[k], 1), in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2938 mode_lib->vba.HActive, in DisplayPipeConfiguration() 3279 long HActive, in TruncToValidBPP() argument 3670 v->HActive, in dml30_ModeSupportAndSystemConfigurationFull() 3728 if (v->DSCEnabled[k] && v->HActive[k] > DCN30_MAX_DSC_IMAGE_WIDTH in dml30_ModeSupportAndSystemConfigurationFull() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 1270 unsigned int HActive, in TruncToValidBPP() argument 3951 static enum dml2_odm_mode DecideODMMode(unsigned int HActive, in DecideODMMode() argument 3976 (HActive <= 1 * MaximumPixelsPerLinePerDSCUnit) ? dml2_odm_mode_bypass : in DecideODMMode() 3977 (HActive <= 2 * MaximumPixelsPerLinePerDSCUnit) ? dml2_odm_mode_combine_2to1 : in DecideODMMode() 3978 …(HActive <= 3 * MaximumPixelsPerLinePerDSCUnit) ? dml2_odm_mode_combine_3to1 : dml2_odm_mode_combi… in DecideODMMode() 3985 (HActive <= 1 * DML2_MAX_FMT_420_BUFFER_WIDTH) ? dml2_odm_mode_bypass : in DecideODMMode() 3986 (HActive <= 2 * DML2_MAX_FMT_420_BUFFER_WIDTH) ? dml2_odm_mode_combine_2to1 : in DecideODMMode() 3987 …(HActive <= 3 * DML2_MAX_FMT_420_BUFFER_WIDTH) ? dml2_odm_mode_combine_3to1 : dml2_odm_mode_combin… in DecideODMMode() 4048 unsigned int HActive, in ValidateODMMode() argument 4074 if (HActive % (NumberOfDPPRequired * pixels_per_clock_cycle)) in ValidateODMMode() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 116 unsigned int HActive; member
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| H A D | display_mode_vba.h | 496 unsigned int HActive[DC__NUM_DPP__MAX]; member
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| H A D | display_mode_vba.c | 617 mode_lib->vba.HActive[mode_lib->vba.NumberOfActivePlanes] = dst->hactive; in fetch_pipe_params()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_mode_vba_20v2.c | 1407 mode_lib->vba.HActive[k] / 2.0 in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1848 (double) mode_lib->vba.HActive[k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1862 (double) mode_lib->vba.HActive[k] in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2935 mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]); in dml20v2_DisplayPipeConfiguration() 4014 } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN20_MAX_DSC_IMAGE_WIDTH)) { in dml20v2_ModeSupportAndSystemConfigurationFull() 4017 … } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { in dml20v2_ModeSupportAndSystemConfigurationFull() 4117 …if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->… in dml20v2_ModeSupportAndSystemConfigurationFull() 4384 mode_lib->vba.HActive[k] in dml20v2_ModeSupportAndSystemConfigurationFull() 4396 dml_ceil(mode_lib->vba.HActive[k] / mode_lib->vba.slices, 1.0), in dml20v2_ModeSupportAndSystemConfigurationFull() 4422 …te[i][j][k] = dml_min(locals->SwathWidthYSingleDPP[k], dml_round(locals->HActive[k] / 2 * locals->… in dml20v2_ModeSupportAndSystemConfigurationFull()
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| H A D | display_mode_vba_20.c | 1347 mode_lib->vba.HActive[k] / 2.0 in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1812 (double) mode_lib->vba.HActive[k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1826 (double) mode_lib->vba.HActive[k] in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2862 mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]); in dml20_DisplayPipeConfiguration() 3903 … } else if (locals->HActive[k] > DCN20_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { in dml20_ModeSupportAndSystemConfigurationFull() 4003 …if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->… in dml20_ModeSupportAndSystemConfigurationFull() 4263 mode_lib->vba.HActive[k] in dml20_ModeSupportAndSystemConfigurationFull() 4275 dml_ceil(mode_lib->vba.HActive[k] / mode_lib->vba.slices, 1.0), in dml20_ModeSupportAndSystemConfigurationFull() 4301 …te[i][j][k] = dml_min(locals->SwathWidthYSingleDPP[k], dml_round(locals->HActive[k] / 2 * locals->… in dml20_ModeSupportAndSystemConfigurationFull()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_mode_vba_21.c | 1700 mode_lib->vba.HActive[k] / 2.0 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1804 (double) mode_lib->vba.HActive[k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1818 (double) mode_lib->vba.HActive[k] in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2960 mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.HRatio[k]); in DisplayPipeConfiguration() 4108 } else if (locals->DSCEnabled[k] && (locals->HActive[k] > DCN21_MAX_DSC_IMAGE_WIDTH)) { in dml21_ModeSupportAndSystemConfigurationFull() 4111 … } else if (locals->HActive[k] > DCN21_MAX_420_IMAGE_WIDTH && locals->OutputFormat[k] == dm_420) { in dml21_ModeSupportAndSystemConfigurationFull() 4211 …if (dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->… in dml21_ModeSupportAndSystemConfigurationFull() 4478 mode_lib->vba.HActive[k] in dml21_ModeSupportAndSystemConfigurationFull() 4490 dml_ceil(mode_lib->vba.HActive[k] / mode_lib->vba.slices, 1.0), in dml21_ModeSupportAndSystemConfigurationFull() 4538 …dml_min(locals->SwathWidthYSingleDPP[k], dml_round(mode_lib->vba.HActive[k] / 2.0 * mode_lib->vba.… in dml21_ModeSupportAndSystemConfigurationFull()
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