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Searched refs:GPHY_CTRL (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/net/ethernet/marvell/
H A Dsky2.c714 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_up()
723 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_phy_power_down()
819 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_wol_init()
906 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_mac_init()
907 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); in sky2_mac_init()
2085 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in sky2_hw_down()
3337 reg = sky2_read16(hw, GPHY_CTRL); in sky2_reset()
3338 sky2_write16(hw, GPHY_CTRL, reg | GPC_INTPOL); in sky2_reset()
H A Dskge.c182 skge_write32(hw, SK_REG(port, GPHY_CTRL), in skge_wol_init()
187 skge_write32(hw, SK_REG(port, GPHY_CTRL), in skge_wol_init()
2079 skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in yukon_mac_init()
2097 skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_SET); in yukon_mac_init()
2098 skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_CLR); in yukon_mac_init()
2248 skge_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); in yukon_stop()
H A Dskge.h851 GPHY_CTRL = 0x0f04,/* 32 bit GPHY Control Reg */ enumerator
1902 /* GPHY_CTRL 32 bit GPHY Control Reg (YUKON only) */
H A Dsky2.h1101 GPHY_CTRL = 0x0f04,/* 32 bit GPHY Control Reg */ enumerator
2034 /* GPHY_CTRL 32 bit GPHY Control Reg (YUKON only) */