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/linux/drivers/staging/axis-fifo/
H A DKconfig3 # "Xilinx AXI-Stream FIFO IP core driver"
6 tristate "Xilinx AXI-Stream FIFO IP core driver"
9 This adds support for the Xilinx AXI-Stream FIFO IP core driver.
10 The AXI Streaming FIFO allows memory mapped access to a AXI Streaming
11 interface. The Xilinx AXI-Stream FIFO IP core can be used to interface
H A Daxis-fifo.txt1 Xilinx AXI-Stream FIFO v4.1 IP core
40 - xlnx,rx-fifo-depth: Depth of RX FIFO in words
48 - xlnx,tx-fifo-depth: Depth of TX FIFO in words
54 - xlnx,use-rx-data: <0x1> if RX FIFO is enabled, <0x0> otherwise
57 - xlnx,use-tx-data: <0x1> if TX FIFO is enabled, <0x0> otherwise
/linux/Documentation/translations/zh_CN/security/tpm/
H A Dtpm_tis.rst9 TPM FIFO接口驱动
12 TCG PTP规范定义了两种接口类型：FIFO和CRB。前者基于顺序的读写操作，
15 FIFO（先进先出）接口被tpm_tis_core依赖的驱动程序使用。最初，Linux只
19 由于历史原因，最初的MMIO驱动被称为tpm_tis，而FIFO驱动的框架被命名为
/linux/Documentation/networking/device_drivers/can/freescale/
H A Dflexcan.rst15 - FIFO
20 configured for RX-FIFO mode.
22 The RX FIFO mode uses a hardware FIFO with a depth of 6 CAN frames,
23 while the mailbox mode uses a software FIFO with a depth of up to 62
40 more performant "RX mailbox" mode and will use "RX FIFO" mode
/linux/drivers/video/fbdev/riva/
H A Driva_hw.c1354 LOAD_FIXED_STATE(nv4,FIFO); in UpdateFifoState()
1356 chip->Tri05 = (RivaTexturedTriangle05 __iomem *)&(chip->FIFO[0x0000E000/4]); in UpdateFifoState()
1365 LOAD_FIXED_STATE(nv10,FIFO); in UpdateFifoState()
1367 chip->Tri05 = (RivaTexturedTriangle05 __iomem *)&(chip->FIFO[0x0000E000/4]); in UpdateFifoState()
1400 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1439 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1444 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1485 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1490 chip->Tri03 = (RivaTexturedTriangle03 __iomem *)&(chip->FIFO[0x0000E000/4]); in LoadStateExt()
1648 LOAD_FIXED_STATE(Riva,FIFO); in LoadStateExt()
[all …]
/linux/Documentation/accel/qaic/
H A Daic100.rst248 FIFO is the request FIFO. The other FIFO is the response FIFO.
252 * Request FIFO head pointer (offset 0x0). Read only by the host. Indicates the
253 latest item in the FIFO the device has consumed.
254 * Request FIFO tail pointer (offset 0x4). Read/write by the host. Host
255 increments this register to add new items to the FIFO.
256 * Response FIFO head pointer (offset 0x8). Read/write by the host. Indicates
257 the latest item in the FIFO the host has consumed.
258 * Response FIFO tail pointer (offset 0xc). Read only by the host. Device
259 increments this register to add new items to the FIFO.
261 The values in each register are indexes in the FIFO. To get the location of the
[all …]
H A Dqaic.rst19 can drain the response FIFO as quickly as the device can insert elements into
20 it, then the device will frequently transition the response FIFO from empty to
30 controller from interrupting the CPU. Then AIC drains the FIFO. Once the FIFO
59 never disabled, allowing each new entry to the FIFO to trigger a new interrupt.
/linux/Documentation/security/tpm/
H A Dtpm_tis.rst4 TPM FIFO interface driver
7 TCG PTP Specification defines two interface types: FIFO and CRB. The former is
11 FIFO (First-In-First-Out) interface is used by the tpm_tis_core dependent
17 framework for FIFO drivers is named as tpm_tis_core. The postfix "tis" in
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmpc5121-psc.txt8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO
19 PSC FIFO Controller and b is a field that represents an
42 FIFO Controller
44 PSC FIFO Controller and b is a field that represents an
/linux/drivers/scsi/aic7xxx/
H A Daic79xx.seq169 * Since this status did not consume a FIFO, we have to
171 * to this transaction. There are two states that a FIFO still
174 * 1) Configured and draining to the host, with a FIFO handler.
177 * Case 1 can be detected by noticing a non-zero FIFO active
179 * the FIFO to complete the SCB.
182 * pointers for this same context in the other FIFO. So, if
308 * The FIFO use count field is shared with the
583 * Allocate a FIFO for a non-packetized transaction.
585 * can allocate a FIFO for a non-packetized transaction.
589 * Do whatever work is required to free a FIFO.
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H A Daic79xx.reg424 * Data FIFO Control
462 * Data FIFO Status
617 * Data FIFO Threshold
1136 * Data FIFO 0 PCI Status
1155 * Data FIFO 1 PCI Status
1692 * Data FIFO Status
2394 * Good Status FIFO
2405 * Data FIFO SCSI Transfer Control
2506 * Data FIFO Status
2516 field DLZERO 0x04 /* FIFO data ends on packet boundary. */
[all …]
/linux/arch/sparc/include/asm/
H A Dfloppy_64.h448 #define FIFO (port + 5) macro
467 sun_pci_fd_out_byte(port, 0x08, FIFO); in sun_pci_fd_sensei()
478 result[i++] = inb(FIFO); in sun_pci_fd_sensei()
513 sun_pci_fd_out_byte(port, 0x07, FIFO); in sun_pci_fd_test_drive()
514 sun_pci_fd_out_byte(port, drive & 0x03, FIFO); in sun_pci_fd_test_drive()
529 #undef FIFO
/linux/arch/powerpc/platforms/512x/
H A DKconfig14 tristate "MPC512x LocalPlus Bus FIFO driver"
17 Enable support for Freescale MPC512x LocalPlus Bus FIFO (SCLPC).
/linux/drivers/video/fbdev/nvidia/
H A Dnv_local.h92 NV_WR32(&(par)->FIFO[0x0010], 0, (data) << 2); \
96 #define READ_GET(par) (NV_RD32(&(par)->FIFO[0x0011], 0) >> 2)
/linux/drivers/edac/
H A DKconfig418 bool "Altera Ethernet FIFO ECC"
422 Altera Ethernet FIFO Memory for Altera SoCs.
425 bool "Altera NAND FIFO ECC"
429 Altera NAND FIFO Memory for Altera SoCs.
432 bool "Altera DMA FIFO ECC"
436 Altera DMA FIFO Memory for Altera SoCs.
439 bool "Altera USB FIFO ECC"
443 Altera USB FIFO Memory for Altera SoCs.
446 bool "Altera QSPI FIFO ECC"
450 Altera QSPI FIFO Memory for Altera SoCs.
[all …]
/linux/sound/soc/cirrus/
H A DKconfig26 Underflow of internal I2S controller FIFO could confuse the
30 fills FIFO with zeroes.
/linux/drivers/char/tpm/
H A DKconfig63 tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface"
68 TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
74 tristate "TPM Interface Specification 1.3 Interface / TPM 2.0 FIFO Interface - (SPI)"
80 TCG TIS 1.3 TPM specification (TPM1.2) or the TCG PTP FIFO
93 tristate "TPM Interface Specification 1.3 Interface / TPM 2.0 FIFO Interface - (I2C - generic)"
105 tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface (MMIO - SynQuacer)"
110 TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
/linux/Documentation/networking/device_drivers/can/ctu/
H A Dctucanfd-driver.rst194 device HW queue (FIFO, mailboxes or whatever the implementation is)
335 the RXNE (RX FIFO Not Empty) bit is set. Frames are read one by one
336 until either no frame is left in the RX FIFO or the maximum work quota
344 in the first word of RX FIFO.
347 for the frame, and only if it succeeds, fetch the frame from FIFO;
349 correct ``skb``, we have to fetch the first work of FIFO. There are
359 #. Add option to peek into the FIFO instead of consuming the word.
372 a partial frame may stay in the FIFO for a prolonged time. Nonetheless,
373 there may be just one owner of the RX FIFO, and thus no one else should
400 SocketCAN, however, supports only one FIFO queue for outgoing
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/linux/arch/arm/include/debug/
H A Dsamsung.S56 @ FIFO enabled...
80 @ FIFO enabled...
/linux/Documentation/scheduler/
H A Dsched-ext.rst125 ``tools/sched_ext/scx_simple.bpf.c`` showing a minimal global FIFO scheduler.
199 sched_ext uses DSQs (dispatch queues) which can operate as both a FIFO and a
200 priority queue. By default, there is one global FIFO (``SCX_DSQ_GLOBAL``),
290 ``scx_bpf_dsq_insert()`` inserts the task on the FIFO of the target DSQ. Use
352 * ``scx_simple[.bpf].c``: Minimal global FIFO scheduler example using a
355 * ``scx_qmap[.bpf].c``: A multi-level FIFO scheduler supporting five
358 * ``scx_central[.bpf].c``: A central FIFO scheduler where all scheduling
363 and only dispatches them on CPU0 in FIFO order. Useful for testing bypass
377 scheduling. Tasks with CPU affinity are direct-dispatched in FIFO order;
/linux/Documentation/sound/cards/
H A Dsb-live-mixer.rst93 The result is forwarded to the ADC capture FIFO (thus to the standard capture
106 The result is forwarded to the ADC capture FIFO (thus to the standard capture
120 The result is forwarded to the ADC capture FIFO (thus to the standard capture
149 of the AC97 codec. The result is forwarded to the ADC capture FIFO (thus to
166 forwarded to the ADC capture FIFO (thus to the standard capture PCM device).
178 forwarded to the ADC capture FIFO (thus to the standard capture PCM device).
189 digital inputs. The result samples are forwarded to the ADC capture FIFO
201 digital inputs. The result samples are forwarded to the ADC capture FIFO
214 capture FIFO (thus to the standard capture PCM device).
/linux/Documentation/admin-guide/blockdev/
H A Dfloppy.rst98 you have an FDC without a FIFO (8272A or 82072). 82072A and
100 If you use nodma mode, I suggest you also set the FIFO
104 If you have a FIFO-able FDC, the floppy driver automatically
113 Disables the FIFO entirely. This is needed if you get "Bus
118 Enables the FIFO. (default)
121 Sets the FIFO threshold. This is mostly relevant in DMA
/linux/Documentation/devicetree/bindings/display/tilcdc/
H A Dpanel.txt10 - fdd: FIFO DMA Request Delay
14 - fifo-th: DMA FIFO threshold
/linux/Documentation/translations/zh_CN/networking/
H A Dtimestamping.rst582 skb 队列。通常，交换机会有一个PTP TX 时间戳寄存器（或有时是一个 FIFO），
583 其中时间戳可用。在 FIFO 的情况下，硬件可能会存储PTP 序列 ID/消息类型/
596 带外（通过另一个 RX 时间戳FIFO）。在 RX 上延迟通常是必要的，当检索时间戳需要
/linux/tools/virtio/virtio-trace/
H A DREADME41 1) Make FIFO in a host
43 of CPUs and a control path, so FIFO (named pipe) should be created as follows:
106 3) Open FIFO in a host

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