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Searched refs:DSCC_PPS_CONFIG5 (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.h46 SRI(DSCC_PPS_CONFIG5, DSCC, id),\
479 uint32_t DSCC_PPS_CONFIG5; member
H A Ddcn20_dsc.c662 REG_SET_2(DSCC_PPS_CONFIG5, 0, in dsc_write_to_registers()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c276 REG_SET_2(DSCC_PPS_CONFIG5, 0, in dsc_write_to_registers()
H A Ddcn401_dsc.h217 uint32_t DSCC_PPS_CONFIG5; member