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Searched refs:DP_SEC_GSP0_ENABLE (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dce/ !
H A Ddce_stream_encoder.h156 SE_SF(DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\
237 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\
427 uint8_t DP_SEC_GSP0_ENABLE; member
560 uint32_t DP_SEC_GSP0_ENABLE; member
H A Ddce_stream_encoder.c857 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, info_frame->vsc.valid); in dce110_stream_encoder_update_dp_info_packets()
882 DP_SEC_GSP0_ENABLE, 0, in dce110_stream_encoder_stop_dp_info_packets()
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn32/ !
H A Ddcn32_dio_stream_encoder.h54 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn401/ !
H A Ddcn401_dio_stream_encoder.h55 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn10/ !
H A Ddcn10_stream_encoder.h224 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\
432 type DP_SEC_GSP0_ENABLE;\
H A Ddcn10_stream_encoder.c764 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, info_frame->vsc.valid); in enc1_stream_encoder_update_dp_info_packets()
883 DP_SEC_GSP0_ENABLE, 0, in enc1_stream_encoder_stop_dp_info_packets()
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn35/ !
H A Ddcn35_dio_stream_encoder.h134 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn314/ !
H A Ddcn314_dio_stream_encoder.h133 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\
/linux/drivers/gpu/drm/amd/display/dc/dio/dcn30/ !
H A Ddcn30_dio_stream_encoder.h134 SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\
H A Ddcn30_dio_stream_encoder.c494 REG_UPDATE(DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, info_frame->vsc.valid); in enc3_stream_encoder_update_dp_info_packets()