Home
last modified time | relevance | path

Searched refs:DML2_MAX_PLANES (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/inc/
H A Ddml2_internal_shared_types.h177 struct core_stream_support_info stream_support_info[DML2_MAX_PLANES];
178 struct core_plane_support_info plane_support_info[DML2_MAX_PLANES];
220 } per_stream[DML2_MAX_PLANES];
226 } per_plane[DML2_MAX_PLANES];
245 bool per_plane_mcache_support[DML2_MAX_PLANES];
246 struct dml2_mcache_surface_allocation mcache_allocations[DML2_MAX_PLANES];
318 unsigned int synchronized_timing_group_masks[DML2_MAX_PLANES];
319 bool group_is_drr_enabled[DML2_MAX_PLANES];
320 bool group_is_drr_active[DML2_MAX_PLANES];
321 double group_line_time_us[DML2_MAX_PLANES];
[all …]
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dcore_types.h572 struct dml2_mcache_surface_allocation mcache_allocations[DML2_MAX_PLANES];
574 union dmub_cmd_fams2_config fams2_stream_base_params[DML2_MAX_PLANES];
576 union dmub_cmd_fams2_config fams2_stream_sub_params[DML2_MAX_PLANES];
577 union dmub_fams2_stream_static_sub_state_v2 fams2_stream_sub_params_v2[DML2_MAX_PLANES];
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_utils.c405 for (unsigned int k = 0; k < DML2_MAX_PLANES; ++k) { in dml2_core_utils_pipe_plane_mapping()
409 for (unsigned int plane_idx = 0; plane_idx < DML2_MAX_PLANES; plane_idx++) { in dml2_core_utils_pipe_plane_mapping()
619 memset(scratch->main_stream_index_from_svp_stream_index, 0, sizeof(int) * DML2_MAX_PLANES); in dml2_core_utils_expand_implict_subvp()
620 memset(scratch->svp_stream_index_from_main_stream_index, 0, sizeof(int) * DML2_MAX_PLANES); in dml2_core_utils_expand_implict_subvp()
621 memset(scratch->main_plane_index_to_phantom_plane_index, 0, sizeof(int) * DML2_MAX_PLANES); in dml2_core_utils_expand_implict_subvp()
H A Ddml2_core_dcn4.c199 memset(scratch->main_stream_index_from_svp_stream_index, 0, sizeof(int) * DML2_MAX_PLANES); in expand_implict_subvp()
200 memset(scratch->svp_stream_index_from_main_stream_index, 0, sizeof(int) * DML2_MAX_PLANES); in expand_implict_subvp()
201 memset(scratch->main_plane_index_to_phantom_plane_index, 0, sizeof(int) * DML2_MAX_PLANES); in expand_implict_subvp()
H A Ddml2_core_dcn4_calcs.c221 for (unsigned int k = 0; k < DML2_MAX_PLANES; ++k) { in dml_calc_pipe_plane_mapping()
225 for (unsigned int plane_idx = 0; plane_idx < DML2_MAX_PLANES; plane_idx++) { in dml_calc_pipe_plane_mapping()
1029 bool DETPieceAssignedToThisSurfaceAlready[DML2_MAX_PLANES]; in CalculateDETBufferSize()
3518 double DCFClkDeepSleepPerSurface[DML2_MAX_PLANES]; in CalculateDCFCLKDeepSleepTdlut()
3607 double zero_double[DML2_MAX_PLANES]; in CalculateDCFCLKDeepSleep()
3608 unsigned int zero_integer[DML2_MAX_PLANES]; in CalculateDCFCLKDeepSleep()
3610 memset(zero_double, 0, DML2_MAX_PLANES * sizeof(double)); in CalculateDCFCLKDeepSleep()
3611 memset(zero_integer, 0, DML2_MAX_PLANES * sizeof(unsigned int)); in CalculateDCFCLKDeepSleep()
3696 unsigned int MaximumSwathHeightY[DML2_MAX_PLANES] = { 0 }; in CalculateSwathAndDETConfiguration()
3697 unsigned int MaximumSwathHeightC[DML2_MAX_PLANES] = { 0 }; in CalculateSwathAndDETConfiguration()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_pmo/
H A Ddml2_pmo_dcn4_fams2.c550 enum dml2_pstate_method per_stream_variant_method[DML2_MAX_PLANES]; in expand_variant_strategy()
1066 for (i = 0; i < DML2_MAX_PLANES; i++) { in all_timings_support_drr()
1111 unsigned int num_planes_per_stream[DML2_MAX_PLANES] = { 0 }; in all_timings_support_svp()
1147 for (i = 0; i < DML2_MAX_PLANES; i++) { in all_timings_support_svp()
1246 for (i = 0; i < DML2_MAX_PLANES; i++) { in all_planes_match_method()
1381 memset(s->pmo_dcn4.sorted_group_gtl_disallow_index, 0, sizeof(unsigned int) * DML2_MAX_PLANES); in is_config_schedulable()
1662 for (i = 0; i < DML2_MAX_PLANES; i++) { in get_vactive_pstate_margin()
1677 for (i = 0; i < DML2_MAX_PLANES; i++) { in get_vactive_det_fill_latency_delay_us()
2168 sizeof(struct dml2_pstate_meta) * DML2_MAX_PLANES); in setup_display_config()
H A Ddml2_pmo_dcn3.c202 unsigned int remap_array[DML2_MAX_PLANES]; in are_timings_trivially_synchronizable()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/
H A Ddml2_dpmm_dcn4.c439 unsigned int remap_array[DML2_MAX_PLANES]; in are_timings_trivially_synchronizable()
477 unsigned int remap_array[DML2_MAX_PLANES]; in find_smallest_idle_time_in_vblank_us()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/
H A Ddml21_wrapper.c113 for (dml_prog_idx = 0; dml_prog_idx < DML2_MAX_PLANES; dml_prog_idx++) { in dml21_calculate_rq_and_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_top/
H A Ddml2_top_soc15.c85 …rt, l->test_mcache.validate_admissibility_params.per_plane_status, sizeof(bool) * DML2_MAX_PLANES); in dml2_top_optimization_test_function_mcache()
1025 …memset(params->per_plane_pipe_mcache_regs, 0, DML2_MAX_PLANES * DML2_MAX_DCN_PIPES * sizeof(struct… in dml2_top_soc15_build_mcache_programming()