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Searched refs:DCSR (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Ddcsr.txt2 Debug Control and Status Register (DCSR) Binding
16 defined DCSR Memory Map. Child nodes will describe the individual
25 The DCSR space exists in the memory-mapped bus.
44 range of the DCSR space.
57 This node represents the region of DCSR space allocated to the EPU
91 offset and length of the DCSR space registers of the device
107 This node represents the region of DCSR space allocated to the NPC
120 offset and length of the DCSR space registers of the device
122 The Nexus Port controller occupies two regions in the DCSR space
144 This node represents the region of DCSR space allocated to the NXC
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/linux/drivers/dma/
H A Dpxa_dma.c27 #define DCSR(n) (0x0000 + ((n) << 2)) macro
272 dcsr = _phy_readl_relaxed(phy, DCSR); in chan_state_show()
436 dcsr = phy_readl_relaxed(phy, DCSR); in is_chan_running()
475 PXA_DCSR_BUSERR | PXA_DCSR_RUN, DCSR); in phy_enable()
485 dcsr = phy_readl_relaxed(phy, DCSR); in phy_disable()
488 phy_writel(phy, dcsr & ~PXA_DCSR_RUN & ~PXA_DCSR_STOPIRQEN, DCSR); in phy_disable()
592 dcsr = phy_readl_relaxed(phy, DCSR); in clear_chan_irq()
593 phy_writel(phy, dcsr, DCSR); in clear_chan_irq()
648 phy_writel_relaxed(phy, dcsr & ~PXA_DCSR_STOPIRQEN, DCSR); in pxad_chan_handler()
H A Dmmp_pdma.c25 #define DCSR 0x0000 macro
314 reg = (phy->idx << 2) + DCSR; in enable_chan()
326 reg = (phy->idx << 2) + DCSR; in disable_chan()
344 u32 reg = (phy->idx << 2) + DCSR; in clear_chan_irq()