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Searched refs:CSR_HSTATEEN0 (Results 1 – 3 of 3) sorted by relevance

/linux/arch/riscv/kvm/
H A Dvcpu.c600 nacl_csr_write(nsh, CSR_HSTATEEN0, cfg->hstateen0); in kvm_arch_vcpu_load()
619 csr_write(CSR_HSTATEEN0, cfg->hstateen0); in kvm_arch_vcpu_load()
/linux/tools/arch/riscv/include/asm/
H A Dcsr.h367 #define CSR_HSTATEEN0 0x60c macro
/linux/arch/riscv/include/asm/
H A Dcsr.h412 #define CSR_HSTATEEN0 0x60c macro