Searched +full:zynqmp +full:- +full:dpsub +full:- +full:1 (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Xilinx ZynqMP DisplayPort Subsystem10 The DisplayPort subsystem of Xilinx ZynqMP (Zynq UltraScale+ MPSoC)14 +------------------------------------------------------------+15 +--------+ | +----------------+ +-----------+ |16 | DPDMA | --->| | --> | Video | Video +-------------+ |17 | 4x vid | | | | | Rendering | -+--> | | | +------+[all …]
1 // SPDX-License-Identifier: GPL-2.03 * ZynqMP DisplayPort Subsystem Driver - Audio support5 * Copyright (C) 2015 - 2024 Xilinx, Inc.8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>9 * - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>53 * - enabled_streams54 * - volumes55 * - current_rate82 struct snd_pcm_runtime *runtime = substream->runtime; in zynqmp_dp_startup()97 writel(val, audio->base + reg); in zynqmp_dp_audio_write()[all …]
1 // SPDX-License-Identifier: GPL-2.03 * ZynqMP Display Controller Driver5 * Copyright (C) 2017 - 2020 Xilinx, Inc.8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>19 #include <linux/dma-mapping.h>21 #include <linux/media-bus-format.h>34 * --------36 * The display controller part of ZynqMP DP subsystem, made of the Audio/Video39 * +------------------------------------------------------------+[all …]
1 // SPDX-License-Identifier: GPL-2.0+3 * dts file for Xilinx ZynqMP5 * (C) Copyright 2014 - 2021, Xilinx, Inc.15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>16 #include <dt-bindings/gpio/gpio.h>17 #include <dt-bindings/interrupt-controller/arm-gic.h>18 #include <dt-bindings/interrupt-controller/irq.h>19 #include <dt-bindings/power/xlnx-zynqmp-power.h>20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>21 #include <dt-bindings/thermal/thermal.h>[all …]