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/linux/fs/ufs/
H A Dballoc.c920 0x00, 0x16, 0x16, 0x2A, 0x16, 0x16, 0x26, 0x4E, 0x16, 0x16, 0x16, 0x3E, 0x2A, 0x3E, 0x4E, 0x8A,
921 0x16, 0x16, 0x16,
[all...]
/linux/arch/arm64/kernel/
H A Drelocate_kernel.S52 ldr x16, [x0, #KIMAGE_HEAD] /* x16 = kimage_head */
57 and x12, x16, PAGE_MASK /* x12 = addr */
61 tbz x16, IND_SOURCE_BIT, .Ltest_indirection
70 tbz x16, IND_INDIRECTION_BIT, .Ltest_destination
74 tbz x16, IND_DESTINATION_BIT, .Lnext
77 ldr x16, [x14], #8 /* entry = *ptr++ */
78 tbz x16, IND_DONE_BIT, .Lloop /* while (!(entry & DONE)) */
H A Defi-rt-wrapper.S32 ldr_l x16, efi_rt_stack_top
33 mov sp, x16
49 mov x16, sp
51 str xzr, [x16, #8] // clear recorded task SP value
77 ldr_l x16, efi_rt_stack_top // clear recorded task SP value
78 str xzr, [x16, #-8]
/linux/arch/arm/mach-omap2/
H A Dopp4xxx_data.c33 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
46 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
56 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
67 VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
80 VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
92 VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
93 VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16),
/linux/drivers/net/wireless/broadcom/b43/
H A Dradio_2057.c181 RADIOREGS7_2G(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c,
188 RADIOREGS7_2G(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71,
195 RADIOREGS7_2G(0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76,
202 RADIOREGS7_2G(0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b,
209 RADIOREGS7_2G(0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80,
216 RADIOREGS7_2G(0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85,
223 RADIOREGS7_2G(0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a,
230 RADIOREGS7_2G(0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f,
237 RADIOREGS7_2G(0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94,
244 RADIOREGS7_2G(0x66, 0x16,
[all...]
H A Dradio_2059.c61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c,
68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71,
75 RADIOREGS(0x4e, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x76,
82 RADIOREGS(0x52, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x7b,
89 RADIOREGS(0x55, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x80,
96 RADIOREGS(0x58, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x85,
103 RADIOREGS(0x5c, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8a,
110 RADIOREGS(0x5f, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x8f,
117 RADIOREGS(0x62, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x94,
124 RADIOREGS(0x66, 0x16,
[all...]
/linux/arch/arm64/include/asm/
H A Dmodule.h34 * (AAPCS64) must assume that a veneer that alters IP0 (x16) and/or
37 * is exactly what we are dealing with here, we are free to use x16
40 __le32 adrp; /* adrp x16, .... */
41 __le32 add; /* add x16, x16, #0x.... */
42 __le32 br; /* br x16 */
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-iota2-lumpy.dts283 MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16
284 MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16
285 MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16
286 MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16
287 MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16
288 MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16
316 MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16
317 MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16
318 MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16
319 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16
[all...]
H A Dimx8mm-phyboard-polis-peb-eval-01.dtso60 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x16
61 MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x16
67 MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15 0x16
68 MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x16
69 MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x16
H A Dimx8mn-tqma8mqnl-mba8mx.dts184 fsl,pins = <MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x16>,
185 <MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x16>;
189 fsl,pins = <MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x16>,
190 <MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x16>;
194 fsl,pins = <MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x16>,
195 <MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x16>;
199 fsl,pins = <MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x16>,
200 <MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x16>;
H A Dimx8mp-icore-mx8mp-edimm2.2.dts121 MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16
122 MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16
123 MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16
124 MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16
125 MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16
126 MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16
H A Dimx8mp-verdin-ivy.dtsi495 <MX8MP_IOMUXC_SAI5_MCLK__GPIO3_IO25 0x16>, /* SODIMM 30 */
496 <MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22 0x16>, /* SODIMM 32 */
497 <MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x16>, /* SODIMM 34 */
498 <MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x16>, /* SODIMM 36 */
499 <MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31 0x16>, /* SODIMM 44 */
500 <MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x16>, /* SODIMM 46 */
501 <MX8MP_IOMUXC_SAI3_RXD__GPIO4_IO30 0x16>, /* SODIMM 48 */
502 <MX8MP_IOMUXC_NAND_CE0_B__GPIO3_IO01 0x16>; /* SODIMM 54 */
507 <MX8MP_IOMUXC_NAND_DATA02__GPIO3_IO08 0x16>, /* SODIMM 60 */
508 <MX8MP_IOMUXC_NAND_DATA03__GPIO3_IO09 0x16>, /* SODIM
[all...]
H A Dimx8mm-verdin-ivy.dtsi454 <MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x16>, /* SODIMM 30 */
455 <MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x16>, /* SODIMM 32 */
456 <MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x16>, /* SODIMM 34 */
457 <MX8MM_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x16>, /* SODIMM 36 */
458 <MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x16>, /* SODIMM 44 */
459 <MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x16>, /* SODIMM 46 */
460 <MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x16>, /* SODIMM 48 */
461 <MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x16>; /* SODIMM 54 */
466 <MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x16>, /* SODIMM 60 */
467 <MX8MM_IOMUXC_NAND_DATA03_GPIO3_IO9 0x16>, /* SODIM
[all...]
/linux/kernel/bpf/preload/iterators/
H A Diterators.lskel-big-endian.h245 \x10\0\x08\0\0\0\0\xbf\x4a\0\0\0\0\0\0\x07\x40\0\0\xff\xff\xff\xe0\xbf\x16\0\0\ in iterators_bpf__load()
251 \xff\xe0\xbf\x16\0\0\0\0\0\0\x18\x26\0\0\0\0\0\0\0\0\0\0\0\0\0\x30\xb4\x30\0\0\ in iterators_bpf__load()
271 \0\0\0\0\x07\x40\0\0\xff\xff\xff\xd0\xbf\x16\0\0\0\0\0\0\x18\x26\0\0\0\0\0\0\0\ in iterators_bpf__load()
312 \0\0\0\0\0\0\0\0\0\x01\0\0\0\x10\0\0\0\0\0\0\0\0\0\0\0\x16\0\0\0\x01\0\0\0\0\0\ in iterators_bpf__load()
323 \0\0\0\0\x95\0\0\0\0\0\0\0\x61\x06\0\x08\0\0\0\0\x18\x16\0\0\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load()
324 \0\x0e\xf8\x63\x10\0\0\0\0\0\0\x61\x06\0\x0c\0\0\0\0\x18\x16\0\0\0\0\0\0\0\0\0\ in iterators_bpf__load()
325 \0\0\0\x0e\xf4\x63\x10\0\0\0\0\0\0\x79\x06\0\x10\0\0\0\0\x18\x16\0\0\0\0\0\0\0\ in iterators_bpf__load()
327 \x18\x16\0\0\0\0\0\0\0\0\0\0\0\0\x0e\xe0\x7b\x10\0\0\0\0\0\0\xb7\x10\0\0\0\0\0\ in iterators_bpf__load()
330 \x61\x0a\xff\x78\0\0\0\0\x18\x16\0\0\0\0\0\0\0\0\0\0\0\0\x0f\x30\x63\x10\0\0\0\ in iterators_bpf__load()
331 \0\0\0\x61\x06\0\x1c\0\0\0\0\x15\0\0\x03\0\0\0\0\x18\x16\ in iterators_bpf__load()
[all...]
/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron-jerry.dts92 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
95 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05
99 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05
103 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05
107 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05
111 0x13 0x05 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05
115 0x14 0x05 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05
119 0x15 0x05 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05>;
126 0x16 0x05 0x17 0x05 0x18 0x05 0x19 0x05 0x1a 0x05 0x1b 0x05 0x89 0x01 0x3a 0x00
129 0x0f 0x09 0x10 0x05 0x11 0x05 0x12 0x05 0x13 0x05 0x14 0x05 0x15 0x05 0x16
[all...]
/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_3_0_0_sh_mask.h36 #define DAGB0_RDCLI0__MIN_BW__SHIFT 0x16
57 #define DAGB0_RDCLI1__MIN_BW__SHIFT 0x16
78 #define DAGB0_RDCLI2__MIN_BW__SHIFT 0x16
99 #define DAGB0_RDCLI3__MIN_BW__SHIFT 0x16
120 #define DAGB0_RDCLI4__MIN_BW__SHIFT 0x16
141 #define DAGB0_RDCLI5__MIN_BW__SHIFT 0x16
162 #define DAGB0_RDCLI6__MIN_BW__SHIFT 0x16
183 #define DAGB0_RDCLI7__MIN_BW__SHIFT 0x16
204 #define DAGB0_RDCLI8__MIN_BW__SHIFT 0x16
225 #define DAGB0_RDCLI9__MIN_BW__SHIFT 0x16
[all...]
H A Dmmhub_3_0_2_sh_mask.h36 #define DAGB0_RDCLI0__MIN_BW__SHIFT 0x16
57 #define DAGB0_RDCLI1__MIN_BW__SHIFT 0x16
78 #define DAGB0_RDCLI2__MIN_BW__SHIFT 0x16
99 #define DAGB0_RDCLI3__MIN_BW__SHIFT 0x16
120 #define DAGB0_RDCLI4__MIN_BW__SHIFT 0x16
141 #define DAGB0_RDCLI5__MIN_BW__SHIFT 0x16
162 #define DAGB0_RDCLI6__MIN_BW__SHIFT 0x16
183 #define DAGB0_RDCLI7__MIN_BW__SHIFT 0x16
204 #define DAGB0_RDCLI8__MIN_BW__SHIFT 0x16
225 #define DAGB0_RDCLI9__MIN_BW__SHIFT 0x16
[all...]
H A Dmmhub_4_1_0_sh_mask.h36 #define DAGB0_RDCLI0__MIN_BW__SHIFT 0x16
57 #define DAGB0_RDCLI1__MIN_BW__SHIFT 0x16
78 #define DAGB0_RDCLI2__MIN_BW__SHIFT 0x16
99 #define DAGB0_RDCLI3__MIN_BW__SHIFT 0x16
120 #define DAGB0_RDCLI4__MIN_BW__SHIFT 0x16
141 #define DAGB0_RDCLI5__MIN_BW__SHIFT 0x16
162 #define DAGB0_RDCLI6__MIN_BW__SHIFT 0x16
183 #define DAGB0_RDCLI7__MIN_BW__SHIFT 0x16
204 #define DAGB0_RDCLI8__MIN_BW__SHIFT 0x16
225 #define DAGB0_RDCLI9__MIN_BW__SHIFT 0x16
[all...]
H A Dmmhub_3_3_0_sh_mask.h36 #define DAGB0_RDCLI0__MIN_BW__SHIFT 0x16
57 #define DAGB0_RDCLI1__MIN_BW__SHIFT 0x16
78 #define DAGB0_RDCLI2__MIN_BW__SHIFT 0x16
99 #define DAGB0_RDCLI3__MIN_BW__SHIFT 0x16
120 #define DAGB0_RDCLI4__MIN_BW__SHIFT 0x16
141 #define DAGB0_RDCLI5__MIN_BW__SHIFT 0x16
162 #define DAGB0_RDCLI6__MIN_BW__SHIFT 0x16
183 #define DAGB0_RDCLI7__MIN_BW__SHIFT 0x16
204 #define DAGB0_RDCLI8__MIN_BW__SHIFT 0x16
225 #define DAGB0_RDCLI9__MIN_BW__SHIFT 0x16
[all...]
H A Dmmhub_9_1_sh_mask.h34 #define DAGB0_RDCLI0__MIN_BW__SHIFT 0x16
55 #define DAGB0_RDCLI1__MIN_BW__SHIFT 0x16
76 #define DAGB0_RDCLI2__MIN_BW__SHIFT 0x16
97 #define DAGB0_RDCLI3__MIN_BW__SHIFT 0x16
118 #define DAGB0_RDCLI4__MIN_BW__SHIFT 0x16
139 #define DAGB0_RDCLI5__MIN_BW__SHIFT 0x16
160 #define DAGB0_RDCLI6__MIN_BW__SHIFT 0x16
181 #define DAGB0_RDCLI7__MIN_BW__SHIFT 0x16
202 #define DAGB0_RDCLI8__MIN_BW__SHIFT 0x16
223 #define DAGB0_RDCLI9__MIN_BW__SHIFT 0x16
[all...]
H A Dmmhub_1_8_0_sh_mask.h36 #define DAGB0_RDCLI0__MIN_BW__SHIFT 0x16
57 #define DAGB0_RDCLI1__MIN_BW__SHIFT 0x16
78 #define DAGB0_RDCLI2__MIN_BW__SHIFT 0x16
99 #define DAGB0_RDCLI3__MIN_BW__SHIFT 0x16
120 #define DAGB0_RDCLI4__MIN_BW__SHIFT 0x16
141 #define DAGB0_RDCLI5__MIN_BW__SHIFT 0x16
162 #define DAGB0_RDCLI6__MIN_BW__SHIFT 0x16
183 #define DAGB0_RDCLI7__MIN_BW__SHIFT 0x16
204 #define DAGB0_RDCLI8__MIN_BW__SHIFT 0x16
225 #define DAGB0_RDCLI9__MIN_BW__SHIFT 0x16
[all...]
H A Dmmhub_1_0_sh_mask.h34 #define DAGB0_RDCLI0__MIN_BW__SHIFT 0x16
55 #define DAGB0_RDCLI1__MIN_BW__SHIFT 0x16
76 #define DAGB0_RDCLI2__MIN_BW__SHIFT 0x16
97 #define DAGB0_RDCLI3__MIN_BW__SHIFT 0x16
118 #define DAGB0_RDCLI4__MIN_BW__SHIFT 0x16
139 #define DAGB0_RDCLI5__MIN_BW__SHIFT 0x16
160 #define DAGB0_RDCLI6__MIN_BW__SHIFT 0x16
181 #define DAGB0_RDCLI7__MIN_BW__SHIFT 0x16
202 #define DAGB0_RDCLI8__MIN_BW__SHIFT 0x16
223 #define DAGB0_RDCLI9__MIN_BW__SHIFT 0x16
[all...]
H A Dmmhub_3_0_1_sh_mask.h36 #define DAGB0_RDCLI0__MIN_BW__SHIFT 0x16
57 #define DAGB0_RDCLI1__MIN_BW__SHIFT 0x16
78 #define DAGB0_RDCLI2__MIN_BW__SHIFT 0x16
99 #define DAGB0_RDCLI3__MIN_BW__SHIFT 0x16
120 #define DAGB0_RDCLI4__MIN_BW__SHIFT 0x16
141 #define DAGB0_RDCLI5__MIN_BW__SHIFT 0x16
162 #define DAGB0_RDCLI6__MIN_BW__SHIFT 0x16
183 #define DAGB0_RDCLI7__MIN_BW__SHIFT 0x16
204 #define DAGB0_RDCLI8__MIN_BW__SHIFT 0x16
225 #define DAGB0_RDCLI9__MIN_BW__SHIFT 0x16
[all...]
/linux/crypto/
H A Dtestmgr.h201 "\x9C\xE6\x16\xCE\x62\x4A\x11\xE0\x08\x6D\x34\x1E\xBC\xAC\xA0\xA1"
210 "\x00\xD8\x40\xB4\x16\x66\xB4\x2E\x92\xEA\x0D\xA3\xB4\x32\x04\xB5"
211 "\xCF\xCE\x33\x52\x52\x4D\x04\x16\xA5\xA4\x41\xE7\x00\xAF\x46\x12"
270 "\x86\x98\x40\xB4\x16\x66\xB4\x2E\x92\xEA\x0D\xA3\xB4\x32\x04\xB5"
271 "\xCF\xCE\x33\x52\x52\x4D\x04\x16\xA5\xA4\x41\xE7\x00\xAF\x46\x15"
299 "\x13\xb4\xc1\xa1\x11\xfc\x40\x2f\x4c\x9d\xdf\x16\x76\x11\x20\x6b",
503 "\x6D\x28\x1B\xA9\x62\xC0\xB8\x16\xA7\x8B\xF9\xBB\xCC\xB4\x15\x7F"
520 "\xD7\xDC\x16\x99\x92\xBE\xCB\x40\x0C\xCE\x7C\x3B\x46\xA2\x5B\x5D"
541 "\x88\x04\x4A\x78\x62\x18\x2E\xF5\xFB\x9B\xEF\x15\xD8\x16\x47\xC6"
556 "\xD3\x1F\x16\x0
[all...]
/linux/drivers/media/dvb-frontends/
H A Drtl2832_priv.h245 {DVBT_AAGC_LOOP_GAIN, 0x16},
248 {DVBT_LOOP_GAIN3, 0x16},
269 {DVBT_AAGC_LOOP_GAIN, 0x16},
272 {DVBT_LOOP_GAIN3, 0x16},
297 {DVBT_AAGC_LOOP_GAIN, 0x16},
300 {DVBT_LOOP_GAIN3, 0x16},
369 {DVBT_AAGC_LOOP_GAIN, 0x16},
394 {DVBT_AAGC_LOOP_GAIN, 0x16},

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