Home
last modified time | relevance | path

Searched full:vbif (Results 1 – 25 of 88) sorted by relevance

1234

/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_vbif.c36 * @vbif: Pointer to hardware vbif driver
40 static int _dpu_vbif_wait_for_xin_halt(struct dpu_hw_vbif *vbif, u32 xin_id) in _dpu_vbif_wait_for_xin_halt() argument
46 if (!vbif || !vbif->cap || !vbif->ops.get_halt_ctrl) { in _dpu_vbif_wait_for_xin_halt()
47 DPU_ERROR("invalid arguments vbif %d\n", vbif != NULL); in _dpu_vbif_wait_for_xin_halt()
51 timeout = ktime_add_us(ktime_get(), vbif->cap->xin_halt_timeout); in _dpu_vbif_wait_for_xin_halt()
53 status = vbif->ops.get_halt_ctrl(vbif, xin_id); in _dpu_vbif_wait_for_xin_halt()
57 status = vbif->ops.get_halt_ctrl(vbif, xin_id); in _dpu_vbif_wait_for_xin_halt()
66 dpu_vbif_name(vbif->idx), xin_id); in _dpu_vbif_wait_for_xin_halt()
70 dpu_vbif_name(vbif->idx), xin_id); in _dpu_vbif_wait_for_xin_halt()
78 * @vbif: Pointer to hardware vbif driver
[all …]
H A Ddpu_hw_catalog.h130 * VBIF sub-blocks and features
131 * @DPU_VBIF_QOS_OTLIM VBIF supports OT Limit
132 * @DPU_VBIF_QOS_REMAP VBIF supports QoS priority remap
510 * @vbif_idx: vbif client index
572 * struct dpu_vbif_cfg - information of VBIF blocks
730 const struct dpu_vbif_cfg *vbif; member
H A Ddpu_vbif.h29 * @vbif_idx: vbif identifier
/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,msm8998-dpu.yaml22 - description: Address offset and size for vbif register set
23 - description: Address offset and size for non-realtime vbif register set
29 - const: vbif
68 reg-names = "mdp", "regdma", "vbif", "vbif_nrt";
H A Dqcom,sm6115-dpu.yaml21 - description: VBIF register set
26 - const: vbif
65 reg-names = "mdp", "vbif";
H A Dqcom,qcm2290-dpu.yaml21 - description: Address offset and size for vbif register set
26 - const: vbif
63 reg-names = "mdp", "vbif";
H A Dqcom,sdm845-dpu.yaml23 - description: Address offset and size for vbif register set
28 - const: vbif
65 reg-names = "mdp", "vbif";
H A Dqcom,sm8150-dpu.yaml23 - description: Address offset and size for vbif register set
28 - const: vbif
58 reg-names = "mdp", "vbif";
H A Dqcom,sm6150-dpu.yaml22 - description: Address offset and size for vbif register set
27 - const: vbif
54 reg-names = "mdp", "vbif";
H A Dqcom,sc7180-dpu.yaml25 - description: Address offset and size for vbif register set
30 - const: vbif
90 reg-names = "mdp", "vbif";
H A Dqcom,sm8650-dpu.yaml25 - description: Address offset and size for vbif register set
30 - const: vbif
66 reg-names = "mdp", "vbif";
H A Dqcom,sm7150-dpu.yaml21 - description: Address offset and size for vbif register set
26 - const: vbif
64 reg-names = "mdp", "vbif";
H A Dqcom,sc8280xp-mdss.yaml97 reg-names = "mdp", "vbif";
H A Dqcom,sm6125-mdss.yaml112 reg-names = "mdp", "vbif";
H A Dqcom,sm6375-mdss.yaml109 reg-names = "mdp", "vbif";
H A Dqcom,sm6115-mdss.yaml109 reg-names = "mdp", "vbif";
H A Dqcom,qcm2290-mdss.yaml118 reg-names = "mdp", "vbif";
H A Dqcom,sm6150-mdss.yaml111 reg-names = "mdp", "vbif";
/linux/drivers/iio/adc/
H A Dmt6359-auxadc.c236 MTK_PMIC_ADC_CHAN(VBIF, PMIC_AUXADC_RQST0, 11, PMIC_AUXADC_IMP0, 8, 8, 1, 1),
264 MTK_PMIC_IIO_CHAN(MT6358, bif_v, VBIF, 11, 12, IIO_VOLTAGE),
283 MTK_PMIC_ADC_CHAN(VBIF, PMIC_AUXADC_RQST0, 11, PMIC_AUXADC_IMP0, 8, 8, 2, 1),
311 MTK_PMIC_IIO_CHAN(MT6359, bif_v, VBIF, 11, 12, IIO_VOLTAGE),
330 MTK_PMIC_ADC_CHAN(VBIF, PMIC_AUXADC_RQST0, 11, PMIC_AUXADC_IMP1, 15, 8, 5, 2),
/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_6_5_qcm2290.h141 .vbif = sdm845_vbif,
H A Ddpu_6_3_sm6115.h148 .vbif = sdm845_vbif,
H A Ddpu_6_9_sm6375.h159 .vbif = sdm845_vbif,
H A Ddpu_4_1_sdm670.h148 .vbif = sdm845_vbif,
H A Ddpu_1_15_msm8917.h180 .vbif = msm8996_vbif,
/linux/drivers/gpu/drm/msm/adreno/
H A Da3xx_gpu.c174 * Most of the VBIF registers on 8974v2 have the correct in a3xx_hw_init()
208 /* Disable VBIF clock gating. This is to enable AXI running in a3xx_hw_init()
312 /* VBIF registers */ in a3xx_hw_init()

1234